linux-kernel - Re: [PATCH] riscv: fix scratch register clearing in M-mode.

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Message-ID: <alpine.DEB.2.21.9999.1912200306570.3767@viisi.sifive.com>
Date:   Fri, 20 Dec 2019 03:07:08 -0800 (PST)
From:   Paul Walmsley <paul.walmsley@...ive.com>
To:     Greentime Hu <greentime.hu@...ive.com>
cc:     green.hu@...il.com, greentime@...nel.org, hch@....de,
        palmer@...belt.com, linux-riscv@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] riscv: fix scratch register clearing in M-mode.

On Thu, 19 Dec 2019, Greentime Hu wrote:

> This patch fixes that the sscratch register clearing in M-mode. It cleared
> sscratch register in M-mode, but it should clear mscratch register. That will
> cause kernel trap if the CPU core doesn't support S-mode when trying to access
> sscratch.
> 
> Fixes: 9e80635619b5 ("riscv: clear the instruction cache and all registers when booting")
> Signed-off-by: Greentime Hu <greentime.hu@...ive.com>

Thanks Greentime, queued for v5.5-rc.

- Paul