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Message-ID: <863ffd39a45848ad9743ce854425b77c@realtek.com>
Date: Mon, 30 Dec 2019 05:53:18 +0000
From: James Tai <james.tai@...ltek.com>
To: Andreas Färber <afaerber@...e.de>,
"linux-realtek-soc@...ts.infradead.org"
<linux-realtek-soc@...ts.infradead.org>
CC: "linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Rob Herring <robh+dt@...nel.org>,
"Mark Rutland" <mark.rutland@....com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>
Subject: RE: [PATCH 04/14] arm64: dts: realtek: rtd16xx: Introduce iso and misc syscon
> Group UART0 into an Isolation syscon mfd node.
> Group UART1 and UART2 into a Miscellaneous syscon mfd node.
>
> Cc: James Tai <james.tai@...ltek.com>
> Signed-off-by: Andreas Färber <afaerber@...e.de>
> ---
> arch/arm64/boot/dts/realtek/rtd16xx.dtsi | 70
> +++++++++++++++++++++-----------
> 1 file changed, 46 insertions(+), 24 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/realtek/rtd16xx.dtsi
> b/arch/arm64/boot/dts/realtek/rtd16xx.dtsi
> index 69cc0d941c8d..8f8f2b328cd1 100644
> --- a/arch/arm64/boot/dts/realtek/rtd16xx.dtsi
> +++ b/arch/arm64/boot/dts/realtek/rtd16xx.dtsi
> @@ -118,34 +118,22 @@
> #size-cells = <1>;
> ranges = <0x0 0x98000000 0x200000>;
>
> - uart0: serial0@...0 {
> - compatible = "snps,dw-apb-uart";
> - reg = <0x7800 0x400>;
> - reg-shift = <2>;
> + iso: syscon@...0 {
> + compatible = "syscon", "simple-mfd";
> + reg = <0x7000 0x1000>;
> reg-io-width = <4>;
> - interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
> - clock-frequency = <27000000>;
> - status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x0 0x7000 0x1000>;
> };
>
> - uart1: serial1@...00 {
> - compatible = "snps,dw-apb-uart";
> - reg = <0x1b200 0x400>;
> - reg-shift = <2>;
> + misc: syscon@...00 {
> + compatible = "syscon", "simple-mfd";
> + reg = <0x1b000 0x1000>;
> reg-io-width = <4>;
> - interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
> - clock-frequency = <432000000>;
> - status = "disabled";
> - };
> -
> - uart2: serial2@...00 {
> - compatible = "snps,dw-apb-uart";
> - reg = <0x1b400 0x400>;
> - reg-shift = <2>;
> - reg-io-width = <4>;
> - interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
> - clock-frequency = <432000000>;
> - status = "disabled";
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0x0 0x1b000 0x1000>;
> };
> };
>
> @@ -159,3 +147,37 @@
> };
> };
> };
> +
> +&iso {
> + uart0: serial0@800 {
> + compatible = "snps,dw-apb-uart";
> + reg = <0x800 0x400>;
> + reg-shift = <2>;
> + reg-io-width = <4>;
> + interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>;
> + clock-frequency = <27000000>;
> + status = "disabled";
> + };
> +};
> +
> +&misc {
> + uart1: serial1@200 {
> + compatible = "snps,dw-apb-uart";
> + reg = <0x200 0x400>;
> + reg-shift = <2>;
> + reg-io-width = <4>;
> + interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
> + clock-frequency = <432000000>;
> + status = "disabled";
> + };
> +
> + uart2: serial2@400 {
> + compatible = "snps,dw-apb-uart";
> + reg = <0x400 0x400>;
> + reg-shift = <2>;
> + reg-io-width = <4>;
> + interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>;
> + clock-frequency = <432000000>;
> + status = "disabled";
> + };
> +};
> --
> 2.16.4
>
>
Acked-by: James Tai <james.tai@...ltek.com>
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