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Message-ID: <20200113140627.GJ3897@sirena.org.uk>
Date:   Mon, 13 Jan 2020 14:06:27 +0000
From:   Mark Brown <broonie@...nel.org>
To:     John Garry <john.garry@...wei.com>
Cc:     Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
        tudor.ambarus@...rochip.com, linux-kernel@...r.kernel.org,
        chenxiang66@...ilicon.com, linuxarm@...wei.com,
        linux-spi@...r.kernel.org, marek.vasut@...il.com,
        linux-mtd@...ts.infradead.org, xuejiancheng@...ilicon.com,
        fengsheng5@...wei.com,
        Mika Westerberg <mika.westerberg@...ux.intel.com>,
        wanghuiqiang <wanghuiqiang@...wei.com>, liusimin4@...wei.com
Subject: Re: [PATCH v2 2/3] spi: Add HiSilicon v3xx SPI NOR flash controller
 driver

On Mon, Jan 13, 2020 at 01:01:06PM +0000, John Garry wrote:
> On 13/01/2020 11:42, Mark Brown wrote:

> > The idiomatic approach appears to be for individual board vendors
> > to allocate IDs, you do end up with multiple IDs from multiple
> > vendors for the same thing.

> But I am not sure how appropriate that same approach would be for some 3rd
> party memory part which we're simply wiring up on our board. Maybe it is.

It seems to be quite common for Intel reference designs to assign
Intel IDs to non-Intel parts on the board (which is where I
became aware of this practice).  

> > In general there's not really much standardizaiton for devices,
> > the bindings that do exist aren't really centrally documented and
> > the Windows standard is just to have the basic device
> > registration in the firmware and do all properties based on
> > quirking based on DMI information.

> OK, so there is always DMI. I hoped to avoid this sort of thing in the linux
> driver :)

Yes, there are some merits to an approach like that.

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