linux-kernel - Re: [PATCH v3] riscv: make sure the cores stay looping in .Lsecondary

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Message-ID: <CAHCEehKchrwd7TTmSrhtEPeCmkrYrx7TX_c6ogpCpSkCKnBQoQ@mail.gmail.com>
Date:   Tue, 14 Jan 2020 11:48:21 +0800
From:   Greentime Hu <greentime.hu@...ive.com>
To:     Paul Walmsley <paul.walmsley@...ive.com>
Cc:     Gt <green.hu@...il.com>, greentime@...nel.org,
        Palmer Dabbelt <palmer@...belt.com>,
        linux-riscv <linux-riscv@...ts.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Andreas Schwab <schwab@...e.de>,
        Anup Patel <anup@...infault.org>
Subject: Re: [PATCH v3] riscv: make sure the cores stay looping in .Lsecondary_park

Hi Paul,

On Mon, Jan 13, 2020 at 2:12 AM Paul Walmsley <paul.walmsley@...ive.com> wrote:
>
> Hi Greentime,
>
> On Thu, 9 Jan 2020, Paul Walmsley wrote:
>
> > On Thu, 9 Jan 2020, Greentime Hu wrote:
> >
> > > The code in secondary_park is currently placed in the .init section.  The
> > > kernel reclaims and clears this code when it finishes booting.  That
> > > causes the cores parked in it to go to somewhere unpredictable, so we
> > > move this function out of init to make sure the cores stay looping there.
> > >
> > > Signed-off-by: Greentime Hu <greentime.hu@...ive.com>
> > > Reviewed-by: Anup Patel <anup@...infault.org>
> >
> > Thanks, the following is what's been queued for v5.5-rc.
>
> During final testing, when building the kernel with an initramfs, I hit
> the following linker error:
>
>   LD      .tmp_vmlinux1
> arch/riscv/kernel/head.o: in function `.L0 ':(.init.text+0x5c): relocation truncated to fit: R_RISCV_JAL against `.Lsecondary_park'
> make[1]: *** [Makefile:1079: vmlinux] Error 1
> make: *** [Makefile:326: __build_one_by_one] Error 2
>
> Could you take a look at this?

I think it is because the sections are too far for bqeu to jump and
the config I used just small enough for it to jump so I didn't see
this bug. Sorry about that.
I tried this fix to boot in Unleashed board.

 #ifdef CONFIG_SMP
        li t0, CONFIG_NR_CPUS
-       bgeu a0, t0, .Lsecondary_park
+       blt a0, t0, .Lgood_cores
+       tail .Lsecondary_park
+.Lgood_cores:
 #endif