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Message-Id: <1578985692-20309-1-git-send-email-sthella@codeaurora.org>
Date: Tue, 14 Jan 2020 12:38:12 +0530
From: Shyam Kumar Thella <sthella@...eaurora.org>
To: agross@...nel.org, srinivas.kandagatla@...aro.org,
robh+dt@...nel.org, mark.rutland@....com
Cc: Shyam Kumar Thella <sthella@...eaurora.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v5] dt-bindings: nvmem: add binding for QTI SPMI SDAM
QTI SDAM allows PMIC peripherals to access the shared memory that is
available on QTI PMICs. Add documentation for it.
Signed-off-by: Shyam Kumar Thella <sthella@...eaurora.org>
---
.../devicetree/bindings/nvmem/qcom,spmi-sdam.yaml | 84 ++++++++++++++++++++++
1 file changed, 84 insertions(+)
create mode 100644 Documentation/devicetree/bindings/nvmem/qcom,spmi-sdam.yaml
diff --git a/Documentation/devicetree/bindings/nvmem/qcom,spmi-sdam.yaml b/Documentation/devicetree/bindings/nvmem/qcom,spmi-sdam.yaml
new file mode 100644
index 0000000..7bbd4e6
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/qcom,spmi-sdam.yaml
@@ -0,0 +1,84 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/nvmem/qcom,spmi-sdam.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Qualcomm Technologies, Inc. SPMI SDAM DT bindings
+
+maintainers:
+ - Shyam Kumar Thella <sthella@...eaurora.org>
+
+description: |
+ The SDAM provides scratch register space for the PMIC clients. This
+ memory can be used by software to store information or communicate
+ to/from the PBUS.
+
+allOf:
+ - $ref: "nvmem.yaml#"
+
+properties:
+ compatible:
+ enum:
+ - qcom,spmi-sdam
+
+ reg:
+ maxItems: 1
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 1
+
+ ranges: true
+
+required:
+ - compatible
+ - reg
+ - ranges
+
+patternProperties:
+ "^.*@[0-9a-f]+$":
+ type: object
+
+ properties:
+ reg:
+ maxItems: 1
+ description:
+ Offset and size in bytes within the storage device.
+
+ bits:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ maxItems: 1
+ items:
+ items:
+ - minimum: 0
+ maximum: 7
+ description:
+ Offset in bit within the address range specified by reg.
+ - minimum: 1
+ description:
+ Size in bit within the address range specified by reg.
+
+ required:
+ - reg
+
+ additionalProperties: false
+
+examples:
+ - |
+ sdam_1: nvram@...0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "qcom,spmi-sdam";
+ reg = <0xb000 0x100>;
+ ranges = <0 0xb000 0x100>;
+
+ /* Data cells */
+ restart_reason: restart@50 {
+ reg = <0x50 0x1>;
+ bits = <6 2>;
+ };
+ };
+...
--
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