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Message-ID: <5149002.dABgk2UiNj@192.168.0.113>
Date:   Sun, 19 Jan 2020 07:19:09 +0000
From:   <Tudor.Ambarus@...rochip.com>
To:     <linux-mtd@...ts.infradead.org>
CC:     <michael@...le.cc>, <linux-kernel@...r.kernel.org>,
        <richard@....at>, <miquel.raynal@...tlin.com>, <vigneshr@...com>
Subject: Re: [PATCH v2] mtd: spi-nor: Add support for w25q32jwm

On Thursday, January 16, 2020 5:42:09 PM EET Michael Walle wrote:
> Add support for the Winbond W25Q32JW-xM flashes. These have a
> programmable QE bit. There is also the W25Q32JW-xQ variant which shares
> the ID with the W25Q32DW and W25Q32FW parts. The W25Q32JW-xQ has the QE
> bit hard strapped to 1, thus don't support the /HOLD and /WP pins.
> 
> This was tested in single, dual and quad mode on a custom board with the
> NXP FlexSPI controller. Also the BP bits as well as the TB bit were
> tested.
> 
> Signed-off-by: Michael Walle <michael@...le.cc>
> ---
> This patch superseeds the following patch:
>   https://lore.kernel.org/linux-mtd/20200103223423.14025-1-michael@walle.cc/
> 
> changes since v1:
>  - renamed flash to w25q32jwm
>  - removed untested flashes
>  - reworded the commit message
> 
>  drivers/mtd/spi-nor/spi-nor.c | 5 +++++
>  1 file changed, 5 insertions(+)

Applied to spi-nor/next. Thanks.
ta

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