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Message-Id: <20200127082331.1.I402470e4a162d69fde47ee2ea708b15bde9751f9@changeid>
Date: Mon, 27 Jan 2020 08:23:48 -0800
From: Douglas Anderson <dianders@...omium.org>
To: Bjorn Andersson <bjorn.andersson@...aro.org>,
Andy Gross <andy.gross@...aro.org>
Cc: mka@...omium.org, vbadigan@...eaurora.org,
Douglas Anderson <dianders@...omium.org>,
devicetree@...r.kernel.org, Vinod Koul <vkoul@...nel.org>,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>
Subject: [PATCH] arm64: dts: qcom: qcs404: Fix sdhci compat string
As per the bindings, the SDHCI controller should have a SoC-specific
compatible string in addition to the generic version-based one. Add
it.
Fixes: 7241ab944da3 ("arm64: dts: qcom: qcs404: Add sdcc1 node")
Signed-off-by: Douglas Anderson <dianders@...omium.org>
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi
index 4ee1e3d5f123..1eea06435779 100644
--- a/arch/arm64/boot/dts/qcom/qcs404.dtsi
+++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi
@@ -685,7 +685,7 @@ pcie_phy: phy@...6000 {
};
sdcc1: sdcc@...4000 {
- compatible = "qcom,sdhci-msm-v5";
+ compatible = "qcom,qcs404-sdhci", "qcom,sdhci-msm-v5";
reg = <0x07804000 0x1000>, <0x7805000 0x1000>;
reg-names = "hc_mem", "cmdq_mem";
--
2.25.0.341.g760bfbb309-goog
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