[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <831d5e28-72df-3175-bfb6-b33985d93a52@nvidia.com>
Date: Tue, 28 Jan 2020 14:10:24 +0000
From: Jon Hunter <jonathanh@...dia.com>
To: Dmitry Osipenko <digetx@...il.com>,
Laxman Dewangan <ldewangan@...dia.com>,
Vinod Koul <vkoul@...nel.org>,
Dan Williams <dan.j.williams@...el.com>,
Thierry Reding <thierry.reding@...il.com>,
Michał Mirosław <mirq-linux@...e.qmqm.pl>
CC: <dmaengine@...r.kernel.org>, <linux-tegra@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v4 11/14] dmaengine: tegra-apb: Clean up suspend-resume
On 21/01/2020 21:23, Dmitry Osipenko wrote:
> 12.01.2020 20:30, Dmitry Osipenko пишет:
>> It is enough to check whether hardware is busy on suspend and to reset
>> it across of suspend-resume because channel's configuration is fully
>> re-programmed on each DMA transaction anyways and because save-restore
>> of an active channel won't end up well without pausing transfer prior to
>> saving of the state (note that all channels shall be idling at the time of
>> suspend, so save-restore is not needed at all).
>>
>> Signed-off-by: Dmitry Osipenko <digetx@...il.com>
>> ---
>> drivers/dma/tegra20-apb-dma.c | 131 +++++++++++++++++-----------------
>> 1 file changed, 67 insertions(+), 64 deletions(-)
>>
>> diff --git a/drivers/dma/tegra20-apb-dma.c b/drivers/dma/tegra20-apb-dma.c
>> index b9d8e57eaf54..398a0e1d6506 100644
>> --- a/drivers/dma/tegra20-apb-dma.c
>> +++ b/drivers/dma/tegra20-apb-dma.c
>> @@ -1392,6 +1392,36 @@ static const struct tegra_dma_chip_data tegra148_dma_chip_data = {
>> .support_separate_wcount_reg = true,
>> };
>>
>> +static int tegra_dma_init_hw(struct tegra_dma *tdma)
>> +{
>> + int err;
>> +
>> + err = reset_control_assert(tdma->rst);
>> + if (err) {
>> + dev_err(tdma->dev, "failed to assert reset: %d\n", err);
>> + return err;
>> + }
>> +
>> + err = clk_enable(tdma->dma_clk);
>> + if (err) {
>> + dev_err(tdma->dev, "failed to enable clk: %d\n", err);
>> + return err;
>> + }
>> +
>> + /* reset DMA controller */
>> + udelay(2);
>> + reset_control_deassert(tdma->rst);
>> +
>> + /* enable global DMA registers */
>> + tdma_write(tdma, TEGRA_APBDMA_GENERAL, TEGRA_APBDMA_GENERAL_ENABLE);
>> + tdma_write(tdma, TEGRA_APBDMA_CONTROL, 0);
>> + tdma_write(tdma, TEGRA_APBDMA_IRQ_MASK_SET, 0xFFFFFFFF);
>> +
>> + clk_disable(tdma->dma_clk);
>> +
>> + return 0;
>> +}
>> +
>> static int tegra_dma_probe(struct platform_device *pdev)
>> {
>> const struct tegra_dma_chip_data *cdata;
>> @@ -1433,30 +1463,18 @@ static int tegra_dma_probe(struct platform_device *pdev)
>> if (ret)
>> return ret;
>>
>> + ret = tegra_dma_init_hw(tdma);
>> + if (ret)
>> + goto err_clk_unprepare;
>> +
>> pm_runtime_irq_safe(&pdev->dev);
>> pm_runtime_enable(&pdev->dev);
>> if (!pm_runtime_enabled(&pdev->dev)) {
>> ret = tegra_dma_runtime_resume(&pdev->dev);
>> if (ret)
>> goto err_clk_unprepare;
>
> Jon, but isn't the RPM mandatory for all Tegra SoCs now and thus
> guaranteed to be enabled? Maybe we should start to remove handling the
> case of unavailable RPM from all Tegra drivers?
Yes that's true, even ARCH_TEGRA selects PM now
Cheers
Jon
--
nvpublic
Powered by blists - more mailing lists