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Date:   Fri, 07 Feb 2020 18:08:39 +0530
From:   harigovi@...eaurora.org
To:     Jeffrey Hugo <jeffrey.l.hugo@...il.com>
Cc:     "open list:DRM PANEL DRIVERS" <dri-devel@...ts.freedesktop.org>,
        MSM <linux-arm-msm@...r.kernel.org>,
        freedreno <freedreno@...ts.freedesktop.org>,
        DTML <devicetree@...r.kernel.org>,
        lkml <linux-kernel@...r.kernel.org>,
        Rob Clark <robdclark@...il.com>, nganji@...eaurora.org,
        Sean Paul <seanpaul@...omium.org>, kalyan_t@...eaurora.org,
        "Kristian H. Kristensen" <hoegsberg@...omium.org>
Subject: Re: [Freedreno] [v1] drm/msm/dsi/pll: call vco set rate explicitly

On 2020-02-06 20:29, Jeffrey Hugo wrote:
> On Thu, Feb 6, 2020 at 2:13 AM Harigovindan P <harigovi@...eaurora.org> 
> wrote:
>> 
>> For a given byte clock, if VCO recalc value is exactly same as
>> vco set rate value, vco_set_rate does not get called assuming
>> VCO is already set to required value. But Due to GDSC toggle,
>> VCO values are erased in the HW. To make sure VCO is programmed
>> correctly, we forcefully call set_rate from vco_prepare.
> 
> Is this specific to certain SoCs? I don't think I've observed this.

As far as Qualcomm SOCs are concerned, since pll is analog and the value 
is directly read from hardware if we get recalc value same as set rate 
value, the vco_set_rate will not be invoked. We checked in our idp 
device which has the same SOC but it works there since the rates are 
different.

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