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Date:   Wed, 12 Feb 2020 13:44:46 +0200
From:   Mika Westerberg <mika.westerberg@...ux.intel.com>
To:     Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Cc:     Darren Hart <dvhart@...radead.org>,
        Lee Jones <lee.jones@...aro.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        "H . Peter Anvin" <hpa@...or.com>, x86@...nel.org,
        Zha Qipeng <qipeng.zha@...el.com>,
        "David E . Box" <david.e.box@...ux.intel.com>,
        Guenter Roeck <linux@...ck-us.net>,
        Heikki Krogerus <heikki.krogerus@...ux.intel.com>,
        Wim Van Sebroeck <wim@...ux-watchdog.org>,
        platform-driver-x86@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v5 09/18] mfd: intel_soc_pmic: Add SCU IPC member to
 struct intel_soc_pmic

On Tue, Feb 11, 2020 at 05:57:06PM +0200, Andy Shevchenko wrote:
> On Tue, Feb 11, 2020 at 04:25:54PM +0300, Mika Westerberg wrote:
> > Both PMIC drivers (intel_soc_pmic_mrfld and intel_soc_pmic_bxtwc) will
> > be using this field going forward to access the SCU IPC instance.
> > 
> > While there add kernel-doc for the intel_soc_pmic structure.
> 
> > + * @irq_chip_data_pwrbtn: Chained IRQ chip data for the power button
> > + * @irq_chip_data_tmu: Chained IRQ chip data for the time management unit
> > + * @irq_chip_data_bcu: Chained IRQ chip data for the burst control unit
> > + * @irq_chip_data_adc: Chained IRQ chip data for the general purpose ADC
> > + * @irq_chip_data_chgr: Chained IRQ chip data for the external charger
> > + * @irq_chip_data_crit: Chained IRQ chip data for the critical event handler
> 
> Perhaps capitalize the decoded abbreviation, e.g.
> general purpose ADC -> General Purpose ADC ?

Sure.

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