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Message-ID: <CAMavQK+8un0eD1X2n+ej3oViqCP1q0bLPAV=B9XqNd906MXkSA@mail.gmail.com>
Date: Thu, 13 Feb 2020 16:19:35 -0500
From: Sean Paul <sean@...rly.run>
To: Rob Clark <robdclark@...il.com>
Cc: dri-devel <dri-devel@...ts.freedesktop.org>,
Rob Clark <robdclark@...omium.org>,
David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>,
Fritz Koenig <frkoenig@...gle.com>,
Nathan Huckleberry <nhuck@...gle.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Alexios Zavras <alexios.zavras@...el.com>,
Matthias Kaehlcke <mka@...omium.org>,
Maxime Ripard <mripard@...nel.org>,
Thomas Gleixner <tglx@...utronix.de>,
"open list:DRM DRIVER FOR MSM ADRENO GPU"
<linux-arm-msm@...r.kernel.org>,
"open list:DRM DRIVER FOR MSM ADRENO GPU"
<freedreno@...ts.freedesktop.org>,
open list <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] drm/msm/dpu: fix BGR565 vs RGB565 confusion
On Thu, Feb 13, 2020 at 3:03 PM Rob Clark <robdclark@...il.com> wrote:
>
> From: Rob Clark <robdclark@...omium.org>
>
> The component order between the two was swapped, resulting in incorrect
> color when games with 565 visual hit the overlay path instead of GPU
> composition.
>
> Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support")
> Signed-off-by: Rob Clark <robdclark@...omium.org>
Reviewed-by: Sean Paul <seanpaul@...omium.org>
> ---
> drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c
> index 24ab6249083a..6f420cc73dbd 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c
> @@ -255,13 +255,13 @@ static const struct dpu_format dpu_format_map[] = {
>
> INTERLEAVED_RGB_FMT(RGB565,
> 0, COLOR_5BIT, COLOR_6BIT, COLOR_5BIT,
> - C2_R_Cr, C0_G_Y, C1_B_Cb, 0, 3,
> + C1_B_Cb, C0_G_Y, C2_R_Cr, 0, 3,
> false, 2, 0,
> DPU_FETCH_LINEAR, 1),
>
> INTERLEAVED_RGB_FMT(BGR565,
> 0, COLOR_5BIT, COLOR_6BIT, COLOR_5BIT,
> - C1_B_Cb, C0_G_Y, C2_R_Cr, 0, 3,
> + C2_R_Cr, C0_G_Y, C1_B_Cb, 0, 3,
> false, 2, 0,
> DPU_FETCH_LINEAR, 1),
>
> --
> 2.24.1
>
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