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Message-ID: <20200217082047.nzxxo7mpejq5yj65@pengutronix.de>
Date: Mon, 17 Feb 2020 09:20:47 +0100
From: Marco Felsch <m.felsch@...gutronix.de>
To: Alifer Moraes <alifer.wsdm@...il.com>
Cc: robh+dt@...nel.org, mark.rutland@....com,
devicetree@...r.kernel.org, peng.fan@....com, shawnguo@...nel.org,
s.hauer@...gutronix.de, linux-kernel@...r.kernel.org,
linux-imx@....com, kernel@...gutronix.de, leonard.crestez@....com,
festevam@...il.com
Subject: Re: [PATCH 1/2] arm64: dts: imx8mm-evk: add phy-reset-gpios for fec1
Hi,
On 20-02-14 16:27, Alifer Moraes wrote:
> imx8mm-evk has a GPIO connected to AR8031 Ethernet PHY's reset pin.
>
> Describe it in the device tree, following phy's datasheet reset duration of 10ms.
>
> Tested booting via NFS.
>
> Signed-off-by: Alifer Moraes <alifer.wsdm@...il.com>
> ---
>
> Originally sent by Peng Fan <peng.fan@....com>
>
> Back then CONFIG_AT803X_PHY was set as "m" in defconfig so the boot process hung
> at nfs boot, now that CONFIG_AT803X_PHY is set as "y" by default, the patch works
> correctly.
>
> Peng's original patch missed to pass the phy-reset-duration, according to the AR8031
> datasheet the reset GPIO needs to stay low for 10ms.
>
> Original thread: https://lkml.org/lkml/2019/10/21/347
>
> arch/arm64/boot/dts/freescale/imx8mm-evk.dts | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk.dts b/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
> index 28ab17a277bb..11903ca86f0e 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk.dts
> @@ -82,6 +82,8 @@
> pinctrl-0 = <&pinctrl_fec1>;
> phy-mode = "rgmii-id";
> phy-handle = <ðphy0>;
> + phy-reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
Where is this gpio muxed?
Regards,
Marco
> + phy-reset-duration = <10>;
> fsl,magic-packet;
> status = "okay";
>
> --
> 2.17.1
>
>
>
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