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Date:   Mon, 17 Feb 2020 09:21:30 +0100
From:   Marco Felsch <m.felsch@...gutronix.de>
To:     Alifer Moraes <alifer.wsdm@...il.com>
Cc:     robh+dt@...nel.org, mark.rutland@....com,
        devicetree@...r.kernel.org, peng.fan@....com, shawnguo@...nel.org,
        s.hauer@...gutronix.de, linux-kernel@...r.kernel.org,
        linux-imx@....com, kernel@...gutronix.de, leonard.crestez@....com,
        festevam@...il.com
Subject: Re: [PATCH 2/2] arm64: dts: imx8mq-evk: add phy-reset-gpios for fec1

Hi Alifer,

On 20-02-14 16:27, Alifer Moraes wrote:
> imx8mq-evk has a GPIO connected to AR8031 Ethernet PHY's reset pin.
> 
> Describe it in the device tree, following phy's datasheet reset duration of 10ms.
> 
> Tested booting via NFS.
> 
> Signed-off-by: Alifer Moraes <alifer.wsdm@...il.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8mq-evk.dts | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> index c36685916683..a49e2bf8afe5 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mq-evk.dts
> @@ -110,6 +110,8 @@
>  	pinctrl-0 = <&pinctrl_fec1>;
>  	phy-mode = "rgmii-id";
>  	phy-handle = <&ethphy0>;
> +	phy-reset-gpios = <&gpio1 9  GPIO_ACTIVE_LOW>;

Same here.

Regards,
  Marco

> +	phy-reset-duration = <10>;
>  	fsl,magic-packet;
>  	status = "okay";
>  
> -- 
> 2.17.1
> 
> 
> 

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