| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening PHC | |
|
Open Source and information security mailing list archives
| ||
|
Date: Mon, 17 Feb 2020 15:06:52 +0530
From: Akash Asthana <akashast@...eaurora.org>
To: robh+dt@...nel.org, agross@...nel.org, mark.rutland@....com
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, mgautam@...eaurora.org,
rojay@...eaurora.org, skakit@...eaurora.org, swboyd@...omium.org,
Akash Asthana <akashast@...eaurora.org>
Subject: [PATCH V4 3/3] dt-bindings: geni-se: Add binding for UART pin swap
Add documentation to support RX/TX/CTS/RTS pin swap in HW.
Signed-off-by: Akash Asthana <akashast@...eaurora.org>
---
Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml
index 11530df..7e4b9af 100644
--- a/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml
+++ b/Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.yaml
@@ -165,6 +165,15 @@ patternProperties:
- description: UART core irq
- description: Wakeup irq (RX GPIO)
+ rx-tx-swap:
+ description: RX and TX pins are swap.
+
+ cts-rts-swap:
+ description: CTS and RTS pins are swap.
+
+ rx-tx-cts-rts-swap:
+ description: RX-TX and CTS-RTS both pairs are swap.
+
required:
- compatible
- interrupts
--
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,\na Linux Foundation Collaborative Project
Powered by blists - more mailing lists