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Date:   Mon, 17 Feb 2020 23:44:02 +0800
From:   Leo Yan <leo.yan@...aro.org>
To:     Mathieu Poirier <mathieu.poirier@...aro.org>
Cc:     Arnaldo Carvalho de Melo <acme@...nel.org>,
        Suzuki K Poulose <suzuki.poulose@....com>,
        Mike Leach <mike.leach@...aro.org>,
        Robert Walker <robert.walker@....com>,
        Peter Zijlstra <peterz@...radead.org>,
        Ingo Molnar <mingo@...hat.com>,
        Mark Rutland <mark.rutland@....com>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Jiri Olsa <jolsa@...hat.com>,
        Namhyung Kim <namhyung@...nel.org>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Coresight ML <coresight@...ts.linaro.org>
Subject: Re: [PATCH v4 0/5] perf cs-etm: Fix synthesizing instruction samples

Hi Mathieu,

On Mon, Feb 17, 2020 at 08:30:37AM -0700, Mathieu Poirier wrote:
> On Fri, 14 Feb 2020 at 20:23, Leo Yan <leo.yan@...aro.org> wrote:
> >
> > On Thu, Feb 13, 2020 at 05:41:59PM +0800, Leo Yan wrote:
> > > This patch series is to address issues for synthesizing instruction
> > > samples, especially when the instruction sample period is small enough,
> > > the current logic cannot synthesize multiple instruction samples within
> > > one instruction range packet.
> >
> > Thanks a lot for Mike's review.
> >
> > Hi Mathieu/Suzuki, I'd like get your green light before we can ask
> > Arnaldo to help merge this patch set.  Thanks!
> 
> At the very least, please wait 10 days before pinging maintainers
> about patch reviews.  I have never failed to review coresight patches
> and this time is no different.

Understand and sorry for hurry pushing.  Take your time for reviewing
and no rush :)

Thanks,
Leo

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