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Message-ID: <20200218114751.70efa015@xps13>
Date:   Tue, 18 Feb 2020 11:47:51 +0100
From:   Miquel Raynal <miquel.raynal@...tlin.com>
To:     Piotr Sroka <piotrs@...ence.com>
Cc:     Kazuhiro Kasai <kasai.kazuhiro@...ionext.com>,
        Richard Weinberger <richard@....at>,
        David Woodhouse <dwmw2@...radead.org>,
        Brian Norris <computersforpeace@...il.com>,
        Marek Vasut <marek.vasut@...il.com>,
        Vignesh Raghavendra <vigneshr@...com>,
        <linux-mtd@...ts.infradead.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 3/4] mtd: rawnand: cadence: change bad block marker size

Hi Piotr,

Piotr Sroka <piotrs@...ence.com> wrote on Mon, 10 Feb 2020 10:55:27
+0100:

> Increase bad block marker size from one byte to two bytes.
> Bad block marker is handled by skip bytes feature of HPNFC.
> Controller excpects this value to be an even number.

             expects

Do we break existing users with this change? Do you know how the
controller behaved until now?

Also needs a Fixes/stable tag I guess?

> 
> Signed-off-by: Piotr Sroka <piotrs@...ence.com>
> ---
>  drivers/mtd/nand/raw/cadence-nand-controller.c | 9 +++------
>  1 file changed, 3 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/mtd/nand/raw/cadence-nand-controller.c b/drivers/mtd/nand/raw/cadence-nand-controller.c
> index 2ebfd0934739..5c1bbb05ab51 100644
> --- a/drivers/mtd/nand/raw/cadence-nand-controller.c
> +++ b/drivers/mtd/nand/raw/cadence-nand-controller.c
> @@ -2612,12 +2612,9 @@ int cadence_nand_attach_chip(struct nand_chip *chip)
>  	chip->options |= NAND_NO_SUBPAGE_WRITE;
>  
>  	cdns_chip->bbm_offs = chip->badblockpos;
> -	if (chip->options & NAND_BUSWIDTH_16) {
> -		cdns_chip->bbm_offs &= ~0x01;
> -		cdns_chip->bbm_len = 2;
> -	} else {
> -		cdns_chip->bbm_len = 1;
> -	}
> +	cdns_chip->bbm_offs &= ~0x01;
> +	/* this value should be even number */
> +	cdns_chip->bbm_len = 2;
>  
>  	ret = nand_ecc_choose_conf(chip,
>  				   &cdns_ctrl->ecc_caps,

Thanks,
Miquèl

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