linux-kernel - Re: [v2 PATCH] irqchip/sifive-plic: Add support for multiple PLICs

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Message-ID: <6a1320aed9609788ccb61d6c66d670bb@kernel.org>
Date:   Fri, 28 Feb 2020 18:53:45 +0000
From:   Marc Zyngier <maz@...nel.org>
To:     Atish Patra <atish.patra@....com>
Cc:     linux-kernel@...r.kernel.org, Jason Cooper <jason@...edaemon.net>,
        linux-riscv@...ts.infradead.org,
        Palmer Dabbelt <palmer@...belt.com>,
        Paul Walmsley <paul.walmsley@...ive.com>,
        Thomas Gleixner <tglx@...utronix.de>
Subject: Re: [v2 PATCH] irqchip/sifive-plic: Add support for multiple PLICs

On 2020-02-21 23:22, Atish Patra wrote:
> Current, PLIC driver can support only 1 PLIC on the board. However,
> there can be multiple PLICs present on a two socket systems in RISC-V.
> 
> Modify the driver so that each PLIC handler can have a information
> about individual PLIC registers and an irqdomain associated with it.
> 
> Tested on two socket RISC-V system based on VCU118 FPGA connected via
> OmniXtend protocol.
> 
> Signed-off-by: Atish Patra <atish.patra@....com>
> ---
> This patch is rebased on top of 5.6-rc2 and following plic fix from
> hotplug series.
> 
> https://lkml.org/lkml/2020/2/20/1220

How do you want this to be merged? I haven't really followed the hotplug
series, but given that this is a pretty simple patch, I'd rather have 
things
based the other way around so that it can be merged independently.

Thanks,

         M.
-- 
Jazz is not dead. It just smells funny...