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Message-ID: <39c1cd2c80d67b8b39fe6e2f867e65fd2d42f6d6.camel@wdc.com>
Date: Fri, 28 Feb 2020 19:03:00 +0000
From: Atish Patra <Atish.Patra@....com>
To: "maz@...nel.org" <maz@...nel.org>
CC: "paul.walmsley@...ive.com" <paul.walmsley@...ive.com>,
"linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>,
"palmer@...belt.com" <palmer@...belt.com>,
"tglx@...utronix.de" <tglx@...utronix.de>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"jason@...edaemon.net" <jason@...edaemon.net>
Subject: Re: [v2 PATCH] irqchip/sifive-plic: Add support for multiple PLICs
On Fri, 2020-02-28 at 18:53 +0000, Marc Zyngier wrote:
> On 2020-02-21 23:22, Atish Patra wrote:
> > Current, PLIC driver can support only 1 PLIC on the board. However,
> > there can be multiple PLICs present on a two socket systems in
> > RISC-V.
> >
> > Modify the driver so that each PLIC handler can have a information
> > about individual PLIC registers and an irqdomain associated with
> > it.
> >
> > Tested on two socket RISC-V system based on VCU118 FPGA connected
> > via
> > OmniXtend protocol.
> >
> > Signed-off-by: Atish Patra <atish.patra@....com>
> > ---
> > This patch is rebased on top of 5.6-rc2 and following plic fix from
> > hotplug series.
> >
> > https://lkml.org/lkml/2020/2/20/1220
>
> How do you want this to be merged? I haven't really followed the
> hotplug
> series, but given that this is a pretty simple patch, I'd rather
> have
> things
> based the other way around so that it can be merged independently.
>
I am fine with that or
I can remove the PLIC patch from the hotplug series and include this
series as that patch is not really dependant on hotplug code.
https://patchwork.kernel.org/patch/11407379/
Let me know what do you prefer.
> Thanks,
>
> M.
--
Regards,
Atish
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