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Message-ID: <4211bc32ef9a2de376f96d9e4d6c05df@kernel.org>
Date: Fri, 28 Feb 2020 19:55:52 +0000
From: Marc Zyngier <maz@...nel.org>
To: Atish Patra <Atish.Patra@....com>
Cc: paul.walmsley@...ive.com, linux-riscv@...ts.infradead.org,
palmer@...belt.com, tglx@...utronix.de,
linux-kernel@...r.kernel.org, jason@...edaemon.net
Subject: Re: [v2 PATCH] irqchip/sifive-plic: Add support for multiple PLICs
On 2020-02-28 19:03, Atish Patra wrote:
> On Fri, 2020-02-28 at 18:53 +0000, Marc Zyngier wrote:
>> On 2020-02-21 23:22, Atish Patra wrote:
>> > Current, PLIC driver can support only 1 PLIC on the board. However,
>> > there can be multiple PLICs present on a two socket systems in
>> > RISC-V.
>> >
>> > Modify the driver so that each PLIC handler can have a information
>> > about individual PLIC registers and an irqdomain associated with
>> > it.
>> >
>> > Tested on two socket RISC-V system based on VCU118 FPGA connected
>> > via
>> > OmniXtend protocol.
>> >
>> > Signed-off-by: Atish Patra <atish.patra@....com>
>> > ---
>> > This patch is rebased on top of 5.6-rc2 and following plic fix from
>> > hotplug series.
>> >
>> > https://lkml.org/lkml/2020/2/20/1220
>>
>> How do you want this to be merged? I haven't really followed the
>> hotplug
>> series, but given that this is a pretty simple patch, I'd rather
>> have
>> things
>> based the other way around so that it can be merged independently.
>>
> I am fine with that or
>
> I can remove the PLIC patch from the hotplug series and include this
> series as that patch is not really dependant on hotplug code.
>
> https://patchwork.kernel.org/patch/11407379/
>
> Let me know what do you prefer.
I'd rather have an independent PLIC series that I can take into 5.7
independently of the rest of the hotplug series. This will make things
simpler for everyone.
Thanks,
M.
--
Jazz is not dead. It just smells funny...
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