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Message-Id: <20200311134115.13257-1-Eugeniy.Paltsev@synopsys.com>
Date: Wed, 11 Mar 2020 16:41:12 +0300
From: Eugeniy Paltsev <Eugeniy.Paltsev@...opsys.com>
To: linux-clk@...r.kernel.org
Cc: linux-kernel@...r.kernel.org, linux-snps-arc@...ts.infradead.org,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Alexey Brodkin <Alexey.Brodkin@...opsys.com>,
Eugeniy Paltsev <Eugeniy.Paltsev@...opsys.com>
Subject: [PATCH 0/3] CLK: HSDK: CGU: updates for HSDK clock management
Bunch of updates for HSDK clock generation unit (CGU) driver.
Eugeniy Paltsev (3):
CLK: HSDK: CGU: check if PLL is bypassed first
CLK: HSDK: CGU: support PLL bypassing
CLK: HSDK: CGU: add support for 148.5MHz clock
drivers/clk/clk-hsdk-pll.c | 70 +++++++++++++++++++++-----------------
1 file changed, 39 insertions(+), 31 deletions(-)
--
2.21.1
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