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Message-Id: <bd6e5ef945a1e51e09bfa7eae2737e4842b13ec7.camel@au1.ibm.com>
Date: Thu, 12 Mar 2020 15:47:14 +1100
From: "Alastair D'Silva" <alastair@....ibm.com>
To: Andrew Donnellan <ajd@...ux.ibm.com>
Cc: "Aneesh Kumar K . V" <aneesh.kumar@...ux.ibm.com>,
"Oliver O'Halloran" <oohall@...il.com>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Paul Mackerras <paulus@...ba.org>,
Michael Ellerman <mpe@...erman.id.au>,
Frederic Barrat <fbarrat@...ux.ibm.com>,
Arnd Bergmann <arnd@...db.de>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Dan Williams <dan.j.williams@...el.com>,
Vishal Verma <vishal.l.verma@...el.com>,
Dave Jiang <dave.jiang@...el.com>,
Ira Weiny <ira.weiny@...el.com>,
Andrew Morton <akpm@...ux-foundation.org>,
Mauro Carvalho Chehab <mchehab+samsung@...nel.org>,
"David S. Miller" <davem@...emloft.net>,
Rob Herring <robh@...nel.org>,
Anton Blanchard <anton@...abs.org>,
Krzysztof Kozlowski <krzk@...nel.org>,
Mahesh Salgaonkar <mahesh@...ux.vnet.ibm.com>,
Madhavan Srinivasan <maddy@...ux.vnet.ibm.com>,
Cédric Le Goater <clg@...d.org>,
Anju T Sudhakar <anju@...ux.vnet.ibm.com>,
Hari Bathini <hbathini@...ux.ibm.com>,
Thomas Gleixner <tglx@...utronix.de>,
Greg Kurz <groug@...d.org>,
Nicholas Piggin <npiggin@...il.com>,
Masahiro Yamada <yamada.masahiro@...ionext.com>,
Alexey Kardashevskiy <aik@...abs.ru>,
linux-kernel@...r.kernel.org, linuxppc-dev@...ts.ozlabs.org,
linux-nvdimm@...ts.01.org, linux-mm@...ck.org
Subject: Re: [PATCH v3 19/27] powerpc/powernv/pmem: Add an IOCTL to report
controller statistics
On Thu, 2020-03-05 at 11:46 +1100, Andrew Donnellan wrote:
> On 21/2/20 2:27 pm, Alastair D'Silva wrote:
> > From: Alastair D'Silva <alastair@...ilva.org>
> >
> > The controller can report a number of statistics that are useful
> > in evaluating the performance and reliability of the card.
> >
> > This patch exposes this information via an IOCTL.
> >
> > Signed-off-by: Alastair D'Silva <alastair@...ilva.org>
> > ---
> > arch/powerpc/platforms/powernv/pmem/ocxl.c | 185
> > +++++++++++++++++++++
> > include/uapi/nvdimm/ocxl-pmem.h | 17 ++
> > 2 files changed, 202 insertions(+)
> >
> > diff --git a/arch/powerpc/platforms/powernv/pmem/ocxl.c
> > b/arch/powerpc/platforms/powernv/pmem/ocxl.c
> > index 2cabafe1fc58..009d4fd29e7d 100644
> > --- a/arch/powerpc/platforms/powernv/pmem/ocxl.c
> > +++ b/arch/powerpc/platforms/powernv/pmem/ocxl.c
> > @@ -758,6 +758,186 @@ static int
> > ioctl_controller_dump_complete(struct ocxlpmem *ocxlpmem)
> > GLOBAL_MMIO_HCI_CONTROLLER_DUMP_COL
> > LECTED);
> > }
> >
> > +/**
> > + * controller_stats_header_parse() - Parse the first 64 bits of
> > the controller stats admin command response
> > + * @ocxlpmem: the device metadata
> > + * @length: out, returns the number of bytes in the response
> > (excluding the 64 bit header)
> > + */
> > +static int controller_stats_header_parse(struct ocxlpmem
> > *ocxlpmem,
> > + u32 *length)
> > +{
> > + int rc;
> > + u64 val;
> > +
> > + u16 data_identifier;
> > + u32 data_length;
> > +
> > + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu,
> > + ocxlpmem-
> > >admin_command.data_offset,
> > + OCXL_LITTLE_ENDIAN, &val);
> > + if (rc)
> > + return rc;
> > +
> > + data_identifier = val >> 48;
> > + data_length = val & 0xFFFFFFFF;
> > +
> > + if (data_identifier != 0x4353) { // 'CS'
> > + dev_err(&ocxlpmem->dev,
> > + "Bad data identifier for controller stats,
> > expected 'CS', got '%-.*s'\n",
> > + 2, (char *)&data_identifier);
> > + return -EINVAL;
>
> Same comment as earlier patches re EINVAL
>
I don't think I've seen a comment yet on these particular blocks. Can
you suggest a better return value?
> > + }
> > +
> > + *length = data_length;
> > + return 0;
> > +}
> > +
> > +static int ioctl_controller_stats(struct ocxlpmem *ocxlpmem,
> > + struct
> > ioctl_ocxl_pmem_controller_stats __user *uarg)
> > +{
> > + struct ioctl_ocxl_pmem_controller_stats args;
> > + u32 length;
> > + int rc;
> > + u64 val;
> > +
> > + memset(&args, '\0', sizeof(args));
> > +
> > + mutex_lock(&ocxlpmem->admin_command.lock);
> > +
> > + rc = admin_command_request(ocxlpmem,
> > ADMIN_COMMAND_CONTROLLER_STATS);
> > + if (rc)
> > + goto out;
> > +
> > + rc = ocxl_global_mmio_write64(ocxlpmem->ocxl_afu,
> > + ocxlpmem-
> > >admin_command.request_offset + 0x08,
> > + OCXL_LITTLE_ENDIAN, 0);
> > + if (rc)
> > + goto out;
> > +
> > + rc = admin_command_execute(ocxlpmem);
> > + if (rc)
> > + goto out;
> > +
> > +
> > + rc = admin_command_complete_timeout(ocxlpmem,
> > + ADMIN_COMMAND_CONTROLLER_ST
> > ATS);
> > + if (rc < 0) {
> > + dev_warn(&ocxlpmem->dev, "Controller stats timed
> > out\n");
> > + goto out;
> > + }
> > +
> > + rc = admin_response(ocxlpmem);
> > + if (rc < 0)
> > + goto out;
> > + if (rc != STATUS_SUCCESS) {
> > + warn_status(ocxlpmem,
> > + "Unexpected status from controller stats",
> > rc);
> > + goto out;
> > + }
> > +
> > + rc = controller_stats_header_parse(ocxlpmem, &length);
> > + if (rc)
> > + goto out;
> > +
> > + if (length != 0x140)
> > + warn_status(ocxlpmem,
> > + "Unexpected length for controller stats
> > data, expected 0x140, got 0x%x",
> > + length);
>
> Might be worth a comment to explain where 0x140 comes from (it looks
> correct from my reading of the spec)
Ok
>
> > +
> > + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu,
> > + ocxlpmem-
> > >admin_command.data_offset + 0x08 + 0x08,
> > + OCXL_LITTLE_ENDIAN, &val);
> > + if (rc)
> > + goto out;
> > +
> > + args.reset_count = val >> 32;
> > + args.reset_uptime = val & 0xFFFFFFFF;
> > +
> > + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu,
> > + ocxlpmem-
> > >admin_command.data_offset + 0x08 + 0x10,
> > + OCXL_LITTLE_ENDIAN, &val);
> > + if (rc)
> > + goto out;
> > +
> > + args.power_on_uptime = val >> 32;
>
> We're not collecting life remaining?
>
It looks like my implementation is out of date. I'll bring it in line
with the spec.
> > +
> > + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu,
> > + ocxlpmem-
> > >admin_command.data_offset + 0x08 + 0x40 + 0x08,
> > + OCXL_LITTLE_ENDIAN,
> > &args.host_load_count);
>
> My reading of the spec says HLC is at +0x10
>
Ditto
> > + if (rc)
> > + goto out;
> > +
> > + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu,
> > + ocxlpmem-
> > >admin_command.data_offset + 0x08 + 0x40 + 0x10,
> > + OCXL_LITTLE_ENDIAN,
> > &args.host_store_count);
>
> HSC at +0x18
>
Ditto
> > + if (rc)
> > + goto out;
> > +
> > + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu,
> > + ocxlpmem-
> > >admin_command.data_offset + 0x08 + 0x40 + 0x18,
> > + OCXL_LITTLE_ENDIAN,
> > &args.media_read_count);
>
> MRC is at +0x50
>
> And you're missing CRU, HLD, HSD
>
> > + if (rc)
> > + goto out;
> > +
> > + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu,
> > + ocxlpmem-
> > >admin_command.data_offset + 0x08 + 0x40 + 0x20,
> > + OCXL_LITTLE_ENDIAN,
> > &args.media_write_count);
>
> MWC at +0x58
>
> > + if (rc)
> > + goto out;
> > +
> > + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu,
> > + ocxlpmem-
> > >admin_command.data_offset + 0x08 + 0x40 + 0x28,
> > + OCXL_LITTLE_ENDIAN,
> > &args.cache_hit_count);
>
> CRHC at +0x90
>
> > + if (rc)
> > + goto out;
> > +
> > + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu,
> > + ocxlpmem-
> > >admin_command.data_offset + 0x08 + 0x40 + 0x30,
> > + OCXL_LITTLE_ENDIAN,
> > &args.cache_miss_count);
>
> This field doesn't seem to exist at all in my copy of the spec
>
> > + if (rc)
> > + goto out;
> > +
> > + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu,
> > + ocxlpmem-
> > >admin_command.data_offset + 0x08 + 0x40 + 0x38,
> > + OCXL_LITTLE_ENDIAN,
> > &args.media_read_latency);
>
> Nor this one
>
> > + if (rc)
> > + goto out;
> > +
> > + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu,
> > + ocxlpmem-
> > >admin_command.data_offset + 0x08 + 0x40 + 0x40,
> > + OCXL_LITTLE_ENDIAN,
> > &args.media_write_latency);
>
> Nor this one
>
> > + if (rc)
> > + goto out;
> > +
> > + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu,
> > + ocxlpmem-
> > >admin_command.data_offset + 0x08 + 0x40 + 0x48,
> > + OCXL_LITTLE_ENDIAN,
> > &args.cache_read_latency);
>
> Nor this one
>
> > + if (rc)
> > + goto out;
> > +
> > + rc = ocxl_global_mmio_read64(ocxlpmem->ocxl_afu,
> > + ocxlpmem-
> > >admin_command.data_offset + 0x08 + 0x40 + 0x50,
> > + OCXL_LITTLE_ENDIAN,
> > &args.cache_write_latency);
>
> Nor this one
>
> > + if (rc)
> > + goto out;
> > +
> > + if (copy_to_user(uarg, &args, sizeof(args))) {
> > + rc = -EFAULT;
> > + goto out;
> > + }
> > +
> > + rc = admin_response_handled(ocxlpmem);
> > + if (rc)
> > + goto out;
> > +
> > + rc = 0;
> > + goto out;
>
> Per Fred this pattern isn't common in the kernel, but perhaps this
> is
> just personal taste
>
Ok
> > +
> > +out:
> > + mutex_unlock(&ocxlpmem->admin_command.lock);
> > + return rc;
> > +}
> > +
> > static long file_ioctl(struct file *file, unsigned int cmd,
> > unsigned long args)
> > {
> > struct ocxlpmem *ocxlpmem = file->private_data;
> > @@ -781,6 +961,11 @@ static long file_ioctl(struct file *file,
> > unsigned int cmd, unsigned long args)
> > case IOCTL_OCXL_PMEM_CONTROLLER_DUMP_COMPLETE:
> > rc = ioctl_controller_dump_complete(ocxlpmem);
> > break;
> > +
> > + case IOCTL_OCXL_PMEM_CONTROLLER_STATS:
> > + rc = ioctl_controller_stats(ocxlpmem,
> > + (struct
> > ioctl_ocxl_pmem_controller_stats __user *)args);
> > + break;
> > }
> >
> > return rc;
> > diff --git a/include/uapi/nvdimm/ocxl-pmem.h
> > b/include/uapi/nvdimm/ocxl-pmem.h
> > index d4d8512d03f7..add223aa2fdb 100644
> > --- a/include/uapi/nvdimm/ocxl-pmem.h
> > +++ b/include/uapi/nvdimm/ocxl-pmem.h
> > @@ -50,6 +50,22 @@ struct ioctl_ocxl_pmem_controller_dump_data {
> > __u64 reserved[8];
> > };
> >
> > +struct ioctl_ocxl_pmem_controller_stats {
> > + __u32 reset_count;
> > + __u32 reset_uptime; /* seconds */
> > + __u32 power_on_uptime; /* seconds */
> > + __u64 host_load_count;
> > + __u64 host_store_count;
> > + __u64 media_read_count;
> > + __u64 media_write_count;
> > + __u64 cache_hit_count;
> > + __u64 cache_miss_count;
> > + __u64 media_read_latency; /* nanoseconds */
> > + __u64 media_write_latency; /* nanoseconds */
> > + __u64 cache_read_latency; /* nanoseconds */
> > + __u64 cache_write_latency; /* nanoseconds */
> > +};
> > +
> > /* ioctl numbers */
> > #define OCXL_PMEM_MAGIC 0x5C
> > /* SCM devices */
> > @@ -57,5 +73,6 @@ struct ioctl_ocxl_pmem_controller_dump_data {
> > #define IOCTL_OCXL_PMEM_CONTROLLER_DUMP _IO(OCX
> > L_PMEM_MAGIC, 0x02)
> > #define IOCTL_OCXL_PMEM_CONTROLLER_DUMP_DATA _IOWR(O
> > CXL_PMEM_MAGIC, 0x03, struct ioctl_ocxl_pmem_controller_dump_data)
> > #define IOCTL_OCXL_PMEM_CONTROLLER_DUMP_COMPLETE _IO(OCXL_PMEM_M
> > AGIC, 0x04)
> > +#define IOCTL_OCXL_PMEM_CONTROLLER_STATS _IO(OCXL_PMEM_M
> > AGIC, 0x05)
> >
> > #endif /* _UAPI_OCXL_SCM_H */
> >
--
Alastair D'Silva
Open Source Developer
Linux Technology Centre, IBM Australia
mob: 0423 762 819
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