linux-kernel - Re: [PATCH v2 2/4] dt-bindings: display: bridge: add it66121 bindings

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <87a0d129-163b-18ae-eb09-cf7df4048dad@baylibre.com>
Date:   Fri, 13 Mar 2020 16:29:58 +0100
From:   Neil Armstrong <narmstrong@...libre.com>
To:     Laurent Pinchart <laurent.pinchart@...asonboard.com>
Cc:     Phong LE <ple@...libre.com>, airlied@...ux.ie, daniel@...ll.ch,
        robh+dt@...nel.org, mark.rutland@....com, a.hajda@...sung.com,
        jonas@...boo.se, jernej.skrabec@...l.net, sam@...nborg.org,
        mripard@...nel.org, heiko.stuebner@...obroma-systems.com,
        linus.walleij@...aro.org, stephan@...hold.net, icenowy@...c.io,
        broonie@...nel.org, mchehab+samsung@...nel.org,
        davem@...emloft.net, gregkh@...uxfoundation.org,
        Jonathan.Cameron@...wei.com, andriy.shevchenko@...ux.intel.com,
        dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 2/4] dt-bindings: display: bridge: add it66121 bindings

On 13/03/2020 15:17, Laurent Pinchart wrote:
> Hi Neil,
> 
> On Fri, Mar 13, 2020 at 03:12:13PM +0100, Neil Armstrong wrote:
>> On 13/03/2020 14:40, Laurent Pinchart wrote:
>>> On Wed, Mar 11, 2020 at 01:51:33PM +0100, Phong LE wrote:
>>>> Add the ITE bridge HDMI it66121 bindings.
>>>>
>>>> Signed-off-by: Phong LE <ple@...libre.com>
>>>> ---
>>>>  .../bindings/display/bridge/ite,it66121.yaml  | 98 +++++++++++++++++++
>>>>  1 file changed, 98 insertions(+)
>>>>  create mode 100644 Documentation/devicetree/bindings/display/bridge/ite,it66121.yaml
>>>>

[...]

>>>> +
>>>> +  pclk-dual-edge:
>>>> +    maxItems: 1
>>>> +    description: enable pclk dual edge mode.
>>>
>>> I'm having a bit of trouble understanding how this operates. Looking at
>>> the driver code the property is only taken into account to calculate the
>>> maximum allowed frequency. How is the IT66121 configured for single vs.
>>> dual pixel clock edge mode ?
>>
>> Dual edge mode is Dual-Data-Rate mode, the normal mode is MEDIA_BUS_FMT_RGB888_1X24 and dual edge is
>> MEDIA_BUS_FMT_RGB888_2X12_LE (or MEDIA_BUS_FMT_RGB888_2X12_BE, not sure) on a single clock period.
>>
>> This should be negociated at runtime, but the bus width should be specified somewhere to select
>> one of the modes.
> 
> How about replacing this property by bus-width to report the connected
> bus width ? It should then become an endpoint property.

It was my thought.

The mediatek dpi also uses this property, which is also very wrong in the same way.

Neil

[...]