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Message-ID: <20200316010416.GI17221@dragon>
Date: Mon, 16 Mar 2020 09:04:17 +0800
From: Shawn Guo <shawnguo@...nel.org>
To: Anson Huang <Anson.Huang@....com>
Cc: robh+dt@...nel.org, mark.rutland@....com, s.hauer@...gutronix.de,
kernel@...gutronix.de, festevam@...il.com, leonard.crestez@....com,
daniel.baluta@....com, abel.vesa@....com,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org, Linux-imx@....com
Subject: Re: [PATCH 1/2] arm64: dts: imx8qxp-mek: Sort labels alphabetically
On Tue, Mar 10, 2020 at 04:52:16PM +0800, Anson Huang wrote:
> Sort the labels alphabetically for consistency.
>
> Signed-off-by: Anson Huang <Anson.Huang@....com>
It doesn't apply to my branch.
Shawn
> ---
> arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 60 +++++++++++++--------------
> 1 file changed, 30 insertions(+), 30 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
> index 13460a3..2ed7aba 100644
> --- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
> @@ -30,29 +30,8 @@
> };
> };
>
> -&adma_lpuart0 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_lpuart0>;
> - status = "okay";
> -};
> -
> -&fec1 {
> - pinctrl-names = "default";
> - pinctrl-0 = <&pinctrl_fec1>;
> - phy-mode = "rgmii-id";
> - phy-handle = <ðphy0>;
> - fsl,magic-packet;
> +&adma_dsp {
> status = "okay";
> -
> - mdio {
> - #address-cells = <1>;
> - #size-cells = <0>;
> -
> - ethphy0: ethernet-phy@0 {
> - compatible = "ethernet-phy-ieee802.3-c22";
> - reg = <0>;
> - };
> - };
> };
>
> &adma_i2c1 {
> @@ -131,6 +110,35 @@
> };
> };
>
> +&adma_lpuart0 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_lpuart0>;
> + status = "okay";
> +};
> +
> +&fec1 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_fec1>;
> + phy-mode = "rgmii-id";
> + phy-handle = <ðphy0>;
> + fsl,magic-packet;
> + status = "okay";
> +
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + ethphy0: ethernet-phy@0 {
> + compatible = "ethernet-phy-ieee802.3-c22";
> + reg = <0>;
> + };
> + };
> +};
> +
> +&scu_key {
> + status = "okay";
> +};
> +
> &usdhc1 {
> assigned-clocks = <&clk IMX_CONN_SDHC0_CLK>;
> assigned-clock-rates = <200000000>;
> @@ -229,11 +237,3 @@
> >;
> };
> };
> -
> -&adma_dsp {
> - status = "okay";
> -};
> -
> -&scu_key {
> - status = "okay";
> -};
> --
> 2.7.4
>
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