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Message-ID: <DB3PR0402MB3916A1240047954022FB4632F5F90@DB3PR0402MB3916.eurprd04.prod.outlook.com>
Date: Mon, 16 Mar 2020 01:11:22 +0000
From: Anson Huang <anson.huang@....com>
To: Shawn Guo <shawnguo@...nel.org>
CC: "robh+dt@...nel.org" <robh+dt@...nel.org>,
"mark.rutland@....com" <mark.rutland@....com>,
"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
"kernel@...gutronix.de" <kernel@...gutronix.de>,
"festevam@...il.com" <festevam@...il.com>,
Leonard Crestez <leonard.crestez@....com>,
Daniel Baluta <daniel.baluta@....com>,
Abel Vesa <abel.vesa@....com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
dl-linux-imx <linux-imx@....com>
Subject: RE: [PATCH 1/2] arm64: dts: imx8qxp-mek: Sort labels alphabetically
Hi, Shawn
> Subject: Re: [PATCH 1/2] arm64: dts: imx8qxp-mek: Sort labels alphabetically
>
> On Tue, Mar 10, 2020 at 04:52:16PM +0800, Anson Huang wrote:
> > Sort the labels alphabetically for consistency.
> >
> > Signed-off-by: Anson Huang <Anson.Huang@....com>
>
> It doesn't apply to my branch.
I will rebase it and resend the patch series.
Thanks,
Anson
>
> Shawn
>
> > ---
> > arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 60 +++++++++++++-----
> ---------
> > 1 file changed, 30 insertions(+), 30 deletions(-)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
> b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
> > index 13460a3..2ed7aba 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts
> > @@ -30,29 +30,8 @@
> > };
> > };
> >
> > -&adma_lpuart0 {
> > - pinctrl-names = "default";
> > - pinctrl-0 = <&pinctrl_lpuart0>;
> > - status = "okay";
> > -};
> > -
> > -&fec1 {
> > - pinctrl-names = "default";
> > - pinctrl-0 = <&pinctrl_fec1>;
> > - phy-mode = "rgmii-id";
> > - phy-handle = <ðphy0>;
> > - fsl,magic-packet;
> > +&adma_dsp {
> > status = "okay";
> > -
> > - mdio {
> > - #address-cells = <1>;
> > - #size-cells = <0>;
> > -
> > - ethphy0: ethernet-phy@0 {
> > - compatible = "ethernet-phy-ieee802.3-c22";
> > - reg = <0>;
> > - };
> > - };
> > };
> >
> > &adma_i2c1 {
> > @@ -131,6 +110,35 @@
> > };
> > };
> >
> > +&adma_lpuart0 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_lpuart0>;
> > + status = "okay";
> > +};
> > +
> > +&fec1 {
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_fec1>;
> > + phy-mode = "rgmii-id";
> > + phy-handle = <ðphy0>;
> > + fsl,magic-packet;
> > + status = "okay";
> > +
> > + mdio {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + ethphy0: ethernet-phy@0 {
> > + compatible = "ethernet-phy-ieee802.3-c22";
> > + reg = <0>;
> > + };
> > + };
> > +};
> > +
> > +&scu_key {
> > + status = "okay";
> > +};
> > +
> > &usdhc1 {
> > assigned-clocks = <&clk IMX_CONN_SDHC0_CLK>;
> > assigned-clock-rates = <200000000>;
> > @@ -229,11 +237,3 @@
> > >;
> > };
> > };
> > -
> > -&adma_dsp {
> > - status = "okay";
> > -};
> > -
> > -&scu_key {
> > - status = "okay";
> > -};
> > --
> > 2.7.4
> >
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