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Date:   Wed, 18 Mar 2020 13:50:03 +0100
From:   Greg KH <gregkh@...uxfoundation.org>
To:     Rajan Vaja <RAJANV@...inx.com>
Cc:     Jolly Shah <JOLLYS@...inx.com>,
        "ard.biesheuvel@...aro.org" <ard.biesheuvel@...aro.org>,
        "mingo@...nel.org" <mingo@...nel.org>,
        "matt@...eblueprint.co.uk" <matt@...eblueprint.co.uk>,
        "sudeep.holla@....com" <sudeep.holla@....com>,
        "hkallweit1@...il.com" <hkallweit1@...il.com>,
        "keescook@...omium.org" <keescook@...omium.org>,
        "dmitry.torokhov@...il.com" <dmitry.torokhov@...il.com>,
        Michal Simek <michals@...inx.com>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v3 20/24] firmware: xilinx: Add APIs to read/write
 GGS/PGGS registers

On Wed, Mar 18, 2020 at 12:41:46PM +0000, Rajan Vaja wrote:
> Hi Greg,
> 
> Thanks for applying patches and review.
> 
> Please see my comment inline.
> 
> > -----Original Message-----
> > From: Greg KH <gregkh@...uxfoundation.org>
> > Sent: 18 March 2020 05:22 PM
> > To: Jolly Shah <JOLLYS@...inx.com>
> > Cc: ard.biesheuvel@...aro.org; mingo@...nel.org; matt@...eblueprint.co.uk;
> > sudeep.holla@....com; hkallweit1@...il.com; keescook@...omium.org;
> > dmitry.torokhov@...il.com; Michal Simek <michals@...inx.com>; Rajan Vaja
> > <RAJANV@...inx.com>; linux-arm-kernel@...ts.infradead.org; linux-
> > kernel@...r.kernel.org; Rajan Vaja <RAJANV@...inx.com>
> > Subject: Re: [PATCH v3 20/24] firmware: xilinx: Add APIs to read/write GGS/PGGS
> > registers
> > 
> > CAUTION: This message has originated from an External Source. Please use
> > proper judgment and caution when opening attachments, clicking links, or
> > responding to this email.
> > 
> > 
> > On Fri, Mar 06, 2020 at 03:47:28PM -0800, Jolly Shah wrote:
> > > --- a/include/linux/firmware/xlnx-zynqmp.h
> > > +++ b/include/linux/firmware/xlnx-zynqmp.h
> > > @@ -105,6 +105,10 @@ enum pm_ioctl_id {
> > >       IOCTL_GET_PLL_FRAC_MODE,
> > >       IOCTL_SET_PLL_FRAC_DATA,
> > >       IOCTL_GET_PLL_FRAC_DATA,
> > > +     IOCTL_WRITE_GGS,
> > > +     IOCTL_READ_GGS,
> > > +     IOCTL_WRITE_PGGS,
> > > +     IOCTL_READ_PGGS,
> > 
> > You do not have explicit numbers here?  Bold :)
> [Rajan] Here new IOCTL IDs are continuous so didn't mention explicit number.

Yes, but is that guaranteed by the compiler?  I keep getting conflicting
advice with that.

> Are asking for adding numbers like below:
> enum pm_ioctl_id {
>       ...
>       IOCTL_GET_PLL_FRAC_DATA = 11,
>       IOCTL_WRITE_GGS = 12,
>       ....
> }

Yes please, especially as your firmware is expecting the explicit values
here, right?  That way you _know_ everything is correct.

thanks,

greg k-h

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