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Date: Wed, 25 Mar 2020 03:17:24 -0700
From: hpa@...or.com
To: Andrew Cooper <andrew.cooper3@...rix.com>,
LKML <linux-kernel@...r.kernel.org>
CC: Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
x86@...nel.org, Jan Kiszka <jan.kiszka@...mens.com>,
James Morris <jmorris@...ei.org>,
David Howells <dhowells@...hat.com>,
Matthew Garrett <mjg59@...gle.com>,
Josh Boyer <jwboyer@...hat.com>,
Zhenzhong Duan <zhenzhong.duan@...cle.com>,
Steve Wahl <steve.wahl@....com>,
Mike Travis <mike.travis@....com>,
Dimitri Sivanich <dimitri.sivanich@....com>,
Arnd Bergmann <arnd@...db.de>,
"Peter Zijlstra (Intel)" <peterz@...radead.org>,
Giovanni Gherdovich <ggherdovich@...e.cz>,
"Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
Len Brown <len.brown@...el.com>,
Kees Cook <keescook@...omium.org>,
Martin Molnar <martin.molnar.programming@...il.com>,
Pingfan Liu <kernelfans@...il.com>,
jailhouse-dev@...glegroups.com
Subject: Re: [PATCH] x86/smpboot: Remove 486-isms from the modern AP boot path
On March 25, 2020 3:14:31 AM PDT, Andrew Cooper <andrew.cooper3@...rix.com> wrote:
>Linux has an implementation of the Universal Start-up Algorithm (MP
>spec,
>Appendix B.4, Application Processor Startup), which includes
>unconditionally
>writing to the Bios Data Area and CMOS registers.
>
>The warm reset vector is only necessary in the non-integrated Local
>APIC case.
>UV and Jailhouse already have an opt-out for this behaviour, but
>blindly using
>the BDA and CMOS on a UEFI or other reduced hardware system isn't
>clever.
>
>Drop the warm_reset flag from struct x86_legacy_features, and tie the
>warm
>vector modifications to the integrated-ness of the Local APIC. This
>has the
>advantage of compiling the warm reset logic out entirely for 64bit
>builds.
>
>CC: Thomas Gleixner <tglx@...utronix.de>
>CC: Ingo Molnar <mingo@...hat.com>
>CC: Borislav Petkov <bp@...en8.de>
>CC: "H. Peter Anvin" <hpa@...or.com>
>CC: x86@...nel.org
>CC: Jan Kiszka <jan.kiszka@...mens.com>
>CC: James Morris <jmorris@...ei.org>
>CC: David Howells <dhowells@...hat.com>
>CC: Andrew Cooper <andrew.cooper3@...rix.com>
>CC: Matthew Garrett <mjg59@...gle.com>
>CC: Josh Boyer <jwboyer@...hat.com>
>CC: Zhenzhong Duan <zhenzhong.duan@...cle.com>
>CC: Steve Wahl <steve.wahl@....com>
>CC: Mike Travis <mike.travis@....com>
>CC: Dimitri Sivanich <dimitri.sivanich@....com>
>CC: Arnd Bergmann <arnd@...db.de>
>CC: "Peter Zijlstra (Intel)" <peterz@...radead.org>
>CC: Giovanni Gherdovich <ggherdovich@...e.cz>
>CC: "Rafael J. Wysocki" <rafael.j.wysocki@...el.com>
>CC: Len Brown <len.brown@...el.com>
>CC: Kees Cook <keescook@...omium.org>
>CC: Martin Molnar <martin.molnar.programming@...il.com>
>CC: Pingfan Liu <kernelfans@...il.com>
>CC: linux-kernel@...r.kernel.org
>CC: jailhouse-dev@...glegroups.com
>Signed-off-by: Andrew Cooper <andrew.cooper3@...rix.com>
>---
>Thomas: I finally found the reference we were discussing in Portland.
>Sorry
>this patch took so long.
>
>I don't have any non-integrated APIC hardware to test with. Can anyone
>help
>me out?
>---
> arch/x86/include/asm/x86_init.h | 1 -
> arch/x86/kernel/apic/x2apic_uv_x.c | 1 -
> arch/x86/kernel/jailhouse.c | 1 -
> arch/x86/kernel/platform-quirks.c | 1 -
> arch/x86/kernel/smpboot.c | 21 ++++++++++++---------
> 5 files changed, 12 insertions(+), 13 deletions(-)
>
>diff --git a/arch/x86/include/asm/x86_init.h
>b/arch/x86/include/asm/x86_init.h
>index 96d9cd208610..006a5d7fd7eb 100644
>--- a/arch/x86/include/asm/x86_init.h
>+++ b/arch/x86/include/asm/x86_init.h
>@@ -229,7 +229,6 @@ enum x86_legacy_i8042_state {
> struct x86_legacy_features {
> enum x86_legacy_i8042_state i8042;
> int rtc;
>- int warm_reset;
> int no_vga;
> int reserve_bios_regions;
> struct x86_legacy_devices devices;
>diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c
>b/arch/x86/kernel/apic/x2apic_uv_x.c
>index ad53b2abc859..5afcfd193592 100644
>--- a/arch/x86/kernel/apic/x2apic_uv_x.c
>+++ b/arch/x86/kernel/apic/x2apic_uv_x.c
>@@ -343,7 +343,6 @@ static int __init uv_acpi_madt_oem_check(char
>*_oem_id, char *_oem_table_id)
> } else if (!strcmp(oem_table_id, "UVH")) {
> /* Only UV1 systems: */
> uv_system_type = UV_NON_UNIQUE_APIC;
>- x86_platform.legacy.warm_reset = 0;
> __this_cpu_write(x2apic_extra_bits, pnodeid <<
>uvh_apicid.s.pnode_shift);
> uv_set_apicid_hibit();
> uv_apic = 1;
>diff --git a/arch/x86/kernel/jailhouse.c b/arch/x86/kernel/jailhouse.c
>index 6eb8b50ea07e..d628fe92d6af 100644
>--- a/arch/x86/kernel/jailhouse.c
>+++ b/arch/x86/kernel/jailhouse.c
>@@ -210,7 +210,6 @@ static void __init jailhouse_init_platform(void)
> x86_platform.calibrate_tsc = jailhouse_get_tsc;
> x86_platform.get_wallclock = jailhouse_get_wallclock;
> x86_platform.legacy.rtc = 0;
>- x86_platform.legacy.warm_reset = 0;
> x86_platform.legacy.i8042 = X86_LEGACY_I8042_PLATFORM_ABSENT;
>
> legacy_pic = &null_legacy_pic;
>diff --git a/arch/x86/kernel/platform-quirks.c
>b/arch/x86/kernel/platform-quirks.c
>index b348a672f71d..d922c5e0c678 100644
>--- a/arch/x86/kernel/platform-quirks.c
>+++ b/arch/x86/kernel/platform-quirks.c
>@@ -9,7 +9,6 @@ void __init x86_early_init_platform_quirks(void)
> {
> x86_platform.legacy.i8042 = X86_LEGACY_I8042_EXPECTED_PRESENT;
> x86_platform.legacy.rtc = 1;
>- x86_platform.legacy.warm_reset = 1;
> x86_platform.legacy.reserve_bios_regions = 0;
> x86_platform.legacy.devices.pnpbios = 1;
>
>diff --git a/arch/x86/kernel/smpboot.c b/arch/x86/kernel/smpboot.c
>index d85e91a8aa8c..e2ebb0be2ee3 100644
>--- a/arch/x86/kernel/smpboot.c
>+++ b/arch/x86/kernel/smpboot.c
>@@ -1049,18 +1049,21 @@ static int do_boot_cpu(int apicid, int cpu,
>struct task_struct *idle,
> * the targeted processor.
> */
>
>- if (x86_platform.legacy.warm_reset) {
>+ /*
>+ * APs are typically started in one of two ways:
>+ *
>+ * - On 486-era hardware with a non-integrated Local APIC, a single
>+ * INIT IPI is sent. When the AP comes out of reset, the BIOS
>+ * follows the warm reset vector to start_ip.
>+ * - On everything with an integrated Local APIC, the start_ip is
>+ * provided in the Startup IPI message, sent as part of an
>+ * INIT-SIPI-SIPI sequence.
>+ */
>+ if (!APIC_INTEGRATED(boot_cpu_apic_version)) {
>
> pr_debug("Setting warm reset code and vector.\n");
>
> smpboot_setup_warm_reset_vector(start_ip);
>- /*
>- * Be paranoid about clearing APIC errors.
>- */
>- if (APIC_INTEGRATED(boot_cpu_apic_version)) {
>- apic_write(APIC_ESR, 0);
>- apic_read(APIC_ESR);
>- }
> }
>
> /*
>@@ -1118,7 +1121,7 @@ static int do_boot_cpu(int apicid, int cpu,
>struct task_struct *idle,
> }
> }
>
>- if (x86_platform.legacy.warm_reset) {
>+ if (!APIC_INTEGRATED(boot_cpu_apic_version)) {
> /*
> * Cleanup possible dangling ends...
> */
We don't support SMP on 486 and haven't for a very long time. Is there any reason to retain that code at all?
--
Sent from my Android device with K-9 Mail. Please excuse my brevity.
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