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Message-ID: <CAAOTY_9S_tWeB5VAVYv8mtFOgtAqw=9ts+a5ugEkaYFvKujosQ@mail.gmail.com>
Date:   Wed, 1 Apr 2020 07:27:16 +0800
From:   Chun-Kuang Hu <chunkuang.hu@...nel.org>
To:     Enric Balletbo i Serra <enric.balletbo@...labora.com>
Cc:     Mark Rutland <mark.rutland@....com>, CK Hu <ck.hu@...iatek.com>,
        Stephen Boyd <sboyd@...nel.org>,
        ulrich.hecht+renesas@...il.com,
        Kate Stewart <kstewart@...uxfoundation.org>,
        Matthias Brugger <mbrugger@...e.com>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Michael Turquette <mturquette@...libre.com>,
        hsinyi@...omium.org, linux-kernel@...r.kernel.org,
        Richard Fontana <rfontana@...hat.com>,
        Nicolas Boichat <drinkcat@...omium.org>,
        linux-mediatek@...ts.infradead.org,
        Allison Randal <allison@...utok.net>, matthias.bgg@...nel.org,
        Matthias Brugger <matthias.bgg@...il.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Collabora Kernel ML <kernel@...labora.com>,
        linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH 2/4] clk / soc: mediatek: Bind clock and gpu driver for mt2712

Hi, Enric:

Enric Balletbo i Serra <enric.balletbo@...labora.com> 於 2020年4月1日 週三 上午5:47寫道:
>
> Now that the mmsys driver is the top-level entry point for the
> multimedia subsystem, we could bind the clock and the gpu driver on
> those devices that is expected to work, so the drm driver is
> intantiated by the mmsys driver and display, hopefully, working again on
> those devices.

Reviewed-by: Chun-Kuang Hu <chunkuang.hu@...nel.org>

>
> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@...labora.com>
> ---
> If you have this hardware, please kindly provide your tested tag. Only
> build tested.
>
>  drivers/clk/mediatek/clk-mt2712-mm.c | 8 ++------
>  drivers/soc/mediatek/mtk-mmsys.c     | 8 ++++++++
>  2 files changed, 10 insertions(+), 6 deletions(-)
>
> diff --git a/drivers/clk/mediatek/clk-mt2712-mm.c b/drivers/clk/mediatek/clk-mt2712-mm.c
> index 1c5948be35f3..660c1f63293f 100644
> --- a/drivers/clk/mediatek/clk-mt2712-mm.c
> +++ b/drivers/clk/mediatek/clk-mt2712-mm.c
> @@ -128,9 +128,10 @@ static const struct mtk_gate mm_clks[] = {
>
>  static int clk_mt2712_mm_probe(struct platform_device *pdev)
>  {
> +       struct device *dev = &pdev->dev;
> +       struct device_node *node = dev->parent->of_node;
>         struct clk_onecell_data *clk_data;
>         int r;
> -       struct device_node *node = pdev->dev.of_node;
>
>         clk_data = mtk_alloc_clk_data(CLK_MM_NR_CLK);
>
> @@ -146,11 +147,6 @@ static int clk_mt2712_mm_probe(struct platform_device *pdev)
>         return r;
>  }
>
> -static const struct of_device_id of_match_clk_mt2712_mm[] = {
> -       { .compatible = "mediatek,mt2712-mmsys", },
> -       {}
> -};
> -
>  static struct platform_driver clk_mt2712_mm_drv = {
>         .probe = clk_mt2712_mm_probe,
>         .driver = {
> diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c
> index 05e322c9c301..c7d3b7bcfa32 100644
> --- a/drivers/soc/mediatek/mtk-mmsys.c
> +++ b/drivers/soc/mediatek/mtk-mmsys.c
> @@ -80,6 +80,10 @@ struct mtk_mmsys_driver_data {
>         const char *clk_driver;
>  };
>
> +static const struct mtk_mmsys_driver_data mt2712_mmsys_driver_data = {
> +       .clk_driver = "clk-mt2712-mm",
> +};
> +
>  static const struct mtk_mmsys_driver_data mt8173_mmsys_driver_data = {
>         .clk_driver = "clk-mt8173-mm",
>  };
> @@ -319,6 +323,10 @@ static int mtk_mmsys_probe(struct platform_device *pdev)
>  }
>
>  static const struct of_device_id of_match_mtk_mmsys[] = {
> +       {
> +               .compatible = "mediatek,mt2712-mmsys",
> +               .data = &mt2712_mmsys_driver_data,
> +       },
>         {
>                 .compatible = "mediatek,mt8173-mmsys",
>                 .data = &mt8173_mmsys_driver_data,
> --
> 2.25.1
>
>
> _______________________________________________
> Linux-mediatek mailing list
> Linux-mediatek@...ts.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-mediatek

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