lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <013a01d6081e$5aa2fb40$0fe8f1c0$@gmail.com>
Date:   Wed, 1 Apr 2020 14:09:09 +0200
From:   <ansuelsmth@...il.com>
To:     "'Rob Herring'" <robh@...nel.org>
Cc:     "'Stanimir Varbanov'" <svarbanov@...sol.com>,
        "'Andy Gross'" <agross@...nel.org>,
        "'Bjorn Andersson'" <bjorn.andersson@...aro.org>,
        "'Bjorn Helgaas'" <bhelgaas@...gle.com>,
        "'Mark Rutland'" <mark.rutland@....com>,
        "'Lorenzo Pieralisi'" <lorenzo.pieralisi@....com>,
        "'Andrew Murray'" <amurray@...goodpenguin.co.uk>,
        "'Philipp Zabel'" <p.zabel@...gutronix.de>,
        <linux-arm-msm@...r.kernel.org>, <linux-pci@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: R: [PATCH 11/12] devicetree: bindings: pci: add force_gen1 for qcom,pcie



> -----Messaggio originale-----
> Da: Rob Herring <robh@...nel.org>
> Inviato: martedì 31 marzo 2020 19:34
> A: Ansuel Smith <ansuelsmth@...il.com>
> Cc: Stanimir Varbanov <svarbanov@...sol.com>; Andy Gross
> <agross@...nel.org>; Bjorn Andersson <bjorn.andersson@...aro.org>;
> Bjorn Helgaas <bhelgaas@...gle.com>; Mark Rutland
> <mark.rutland@....com>; Lorenzo Pieralisi <lorenzo.pieralisi@....com>;
> Andrew Murray <amurray@...goodpenguin.co.uk>; Philipp Zabel
> <p.zabel@...gutronix.de>; linux-arm-msm@...r.kernel.org; linux-
> pci@...r.kernel.org; devicetree@...r.kernel.org; linux-
> kernel@...r.kernel.org
> Oggetto: Re: [PATCH 11/12] devicetree: bindings: pci: add force_gen1 for
> qcom,pcie
> 
> On Fri, Mar 20, 2020 at 07:34:53PM +0100, Ansuel Smith wrote:
> > Document force_gen1 optional definition to limit pcie
> > line to GEN1 speed
> >
> > Signed-off-by: Ansuel Smith <ansuelsmth@...il.com>
> > ---
> >  Documentation/devicetree/bindings/pci/qcom,pcie.txt | 5 +++++
> >  1 file changed, 5 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/pci/qcom,pcie.txt
> b/Documentation/devicetree/bindings/pci/qcom,pcie.txt
> > index 8c1d014f37b0..766876465c42 100644
> > --- a/Documentation/devicetree/bindings/pci/qcom,pcie.txt
> > +++ b/Documentation/devicetree/bindings/pci/qcom,pcie.txt
> > @@ -260,6 +260,11 @@
> >  	Definition: If not defined is 0. In ipq806x is set to 7. In newer
> >  				revision (v2.0) the offset is zero.
> >
> > +- force_gen1:
> > +	Usage: optional
> > +	Value type: <u32>
> > +	Definition: Set 1 to force the pcie line to GEN1
> > +
> 
> I believe we have a standard property 'link-speed' for this purpose.
> 

Yes this will be dropped in v2

> >  * Example for ipq/apq8064
> >  	pcie@...00000 {
> >  		compatible = "qcom,pcie-apq8064", "qcom,pcie-ipq8064",
> "snps,dw-pcie";
> > --
> > 2.25.1
> >

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ