[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <a728417c-a0b4-d1dc-5257-19e869085bd3@arm.com>
Date: Thu, 2 Apr 2020 08:08:41 +0530
From: Anshuman Khandual <anshuman.khandual@....com>
To: Suzuki K Poulose <suzuki.poulose@....com>,
linux-arm-kernel@...ts.infradead.org
Cc: catalin.marinas@....com, will@...nel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/6] arm64/cpufeature: Add remaining feature bits in
ID_MMFR4 register
On 03/20/2020 11:41 PM, Suzuki K Poulose wrote:
> On 01/28/2020 12:39 PM, Anshuman Khandual wrote:
>> Enable all remaining feature bits like EVT, CCIDX, LSM, HPDS, CnP, XNX,
>> SpecSEI in ID_MMFR4 register per ARM DDI 0487E.a.
>
> It might be worth adding a comment here mentioning why SpecSEI is
> HIGHER_SAFE, unlike the majority.
Sure, will do.
>
>>
>> Cc: Catalin Marinas <catalin.marinas@....com>
>> Cc: Will Deacon <will@...nel.org>
>> Cc: Suzuki K Poulose <suzuki.poulose@....com>
>> Cc: linux-kernel@...r.kernel.org
>> Signed-off-by: Anshuman Khandual <anshuman.khandual@....com>
>
> With that:
>
> Reviewed-by: Suzuki K Poulose <suzuki.poulose@....com>
>
Powered by blists - more mailing lists