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Message-Id: <20200402000234.226466-5-helen.koike@collabora.com>
Date: Wed, 1 Apr 2020 21:02:34 -0300
From: Helen Koike <helen.koike@...labora.com>
To: devicetree@...r.kernel.org, linux-media@...r.kernel.org,
linux-rockchip@...ts.infradead.org
Cc: linux-kernel@...r.kernel.org, devel@...verdev.osuosl.org,
robh+dt@...nel.org, heiko@...ech.de, hverkuil-cisco@...all.nl,
kernel@...labora.com, dafna.hirschfeld@...labora.com,
ezequiel@...labora.com, mark.rutland@....com,
karthik.poduval@...il.com
Subject: [PATCH 4/4] arm64: dts: rockchip: add isp0 node for rk3399
From: Shunqian Zheng <zhengsq@...k-chips.com>
RK3399 has two ISPs, but only ISP0 was tested at present.
Add isp0 node in rk3399 dtsi
Verified with:
make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/media/rockchip-isp1.yaml
Signed-off-by: Shunqian Zheng <zhengsq@...k-chips.com>
Signed-off-by: Jacob Chen <jacob2.chen@...k-chips.com>
Signed-off-by: Helen Koike <helen.koike@...labora.com>
---
This patch was originally part of this patchset:
https://patchwork.kernel.org/patch/10267431/
The only difference is:
- add phy properties
- add ports
---
arch/arm64/boot/dts/rockchip/rk3399.dtsi | 27 ++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index fc0295d2a65a1..815099a0cd0dd 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -1718,6 +1718,33 @@ vopb_mmu: iommu@...03f00 {
status = "disabled";
};
+ isp0: isp0@...10000 {
+ compatible = "rockchip,rk3399-cif-isp";
+ reg = <0x0 0xff910000 0x0 0x4000>;
+ interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH 0>;
+ clocks = <&cru SCLK_ISP0>,
+ <&cru ACLK_ISP0>, <&cru ACLK_ISP0_WRAPPER>,
+ <&cru HCLK_ISP0>, <&cru HCLK_ISP0_WRAPPER>;
+ clock-names = "clk_isp",
+ "aclk_isp", "aclk_isp_wrap",
+ "hclk_isp", "hclk_isp_wrap";
+ power-domains = <&power RK3399_PD_ISP0>;
+ iommus = <&isp0_mmu>;
+ phys = <&mipi_dphy_rx0>;
+ phy-names = "dphy";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+ };
+ };
+
isp0_mmu: iommu@...14000 {
compatible = "rockchip,iommu";
reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
--
2.26.0
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