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Message-ID: <20200407084712.lhvrotihtxr5rqxa@gilmour.lan>
Date: Tue, 7 Apr 2020 10:47:12 +0200
From: Maxime Ripard <maxime@...no.tech>
To: Clément Péron <peron.clem@...il.com>
Cc: Chen-Yu Tsai <wens@...e.org>, Rob Herring <robh+dt@...nel.org>,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
devicetree <devicetree@...r.kernel.org>,
linux-kernel <linux-kernel@...r.kernel.org>,
linux-sunxi <linux-sunxi@...glegroups.com>,
Ondrej Jirman <megous@...ous.com>
Subject: Re: [PATCH v2 3/7] arm64: dts: allwinner: h6: Add CPU Operating
Performance Points table
On Mon, Apr 06, 2020 at 08:03:34PM +0200, Clément Péron wrote:
> > > --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> > > @@ -253,6 +253,10 @@
> > > #address-cells = <1>;
> > > #size-cells = <1>;
> > >
> > > + speedbin_efuse: speed@1c {
> > > + reg = <0x1c 0x4>;
> > > + };
> > > +
> >
> > You should order this by address, so after the THS calibration. Also,
> > using a less generic node name than "speed" would be great. What about
> > soc-bin ?
>
> Indeed it's too generic.
> I will keep coherency with i.MX8 and use "cpu_speed_grade"
It works for me, but remember that you can't use underscores :)
Maxime
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