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Message-ID: <20200414151748.GA5624@afzalpc>
Date: Tue, 14 Apr 2020 20:47:48 +0530
From: afzal mohammed <afzal.mohd.ma@...il.com>
To: Arnd Bergmann <arnd@...db.de>, Russell King <linux@...linux.org.uk>
Cc: Alan Kao <alankao@...estech.com>, Eric Lin <tesheng@...estech.com>,
Gary Guo <gary@...yguo.net>, alex@...ti.fr,
David Abdurachmanov <david.abdurachmanov@...il.com>,
Anup Patel <Anup.Patel@....com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Andrew Morton <akpm@...ux-foundation.org>,
Steven Price <steven.price@....com>, atish.patra@....com,
yash.shah@...ive.com, Albert Ou <aou@...s.berkeley.edu>,
Palmer Dabbelt <palmer@...belt.com>,
Greentime Hu <green.hu@...il.com>, zong.li@...ive.com,
Paul Walmsley <paul.walmsley@...ive.com>,
Mike Rapoport <rppt@...ux.ibm.com>,
Thomas Gleixner <tglx@...utronix.de>,
Borislav Petkov <bp@...e.de>,
Logan Gunthorpe <logang@...tatee.com>,
linux-riscv@...ts.infradead.org
Subject: Re: [PATCH 0/3] Highmem support for 32-bit RISC-V
+ rmk
Hi Arnd,
On Wed, Apr 08, 2020 at 04:40:17PM +0200, Arnd Bergmann wrote:
> No code yet, so far not much more than the ideas that I listed. We
> are currently looking for someone interested in doing the work
> or maybe sponsoring it if they have a strong interest.
If no one have yet taken it up, i am interested in doing the work, i
will sponsor myself :). i will proceed at a slow pace without derailing
my other things normal.
To keep expectations realistic: i have not yet taken task of this
complexity, it is more of a learning for me. My familiarity with Linux
at the ARM architecture level is mostly on no-MMU (Cortex-M), have not
worked so far seriously on MMU Linux at the ARM architectural level,
though used to go through ARM ARM v7-AR at times.
i have a few 32-bit ARM Cortex-A (A5, A8 & A9) boards, maximum RAM 1G,
none have LPAE, seems i have to buy one for this purpose.
And if someone else wants to do it, i will not take it up.
Regards
afzal
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