linux-kernel - Re: [PATCH 2/3] x86/split_lock: Bits in IA32_CORE

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Date:   Thu, 16 Apr 2020 15:33:35 -0700
From:   "Luck, Tony" <tony.luck@...el.com>
To:     Thomas Gleixner <tglx@...utronix.de>
Cc:     Ingo Molnar <mingo@...nel.org>, Fenghua Yu <fenghua.yu@...el.com>,
        Borislav Petkov <bp@...en8.de>, H Peter Anvin <hpa@...or.com>,
        Ashok Raj <ashok.raj@...el.com>,
        Ravi V Shankar <ravi.v.shankar@...el.com>,
        Sean Christopherson <sean.j.christopherson@...el.com>,
        Andy Lutomirski <luto@...nel.org>,
        linux-kernel@...r.kernel.org, x86@...nel.org
Subject: Re: [PATCH 2/3] x86/split_lock: Bits in IA32_CORE_CAPABILITIES are
 not architectural

On Fri, Apr 17, 2020 at 12:06:47AM +0200, Thomas Gleixner wrote:
> Tony Luck <tony.luck@...el.com> writes:
> > Features enumerated by IA32_CORE_CAPABILITIES are model specific and
> > implementation details may vary in different cpu models. Thus it is only
> > safe to trust features after checking the CPU model.
> 
> What's the point of the IA32_CORE_CAPABILITIES check if we need a model
> match to figure out whether IA32_CORE_CAPABILITIES bit 5 is valid to
> enumerate split lock detection?
> 
> IOW, are we going to see CPUs which end up in the match list and have
> bit 5 cleared in IA32_CORE_CAPABILITIES?

There may be low-end SKUs of a model that don't have all the features of
the high-end SKUs. So yes, you may find that a specific SKU of a model
on the list for a feature doesn't have the feature.

A model specific feature may also have implementation differences
on different models.  E.g. if Intel were to produce a model that
did split lock "right" (with thread-scoped control). That would
still use the same bit in IA32_CORE_CAPABILITIES, but the OS would
need model specific knowledge to know that this split lock detect
worked differently from another model that has split lock detect.

-Tony