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Message-ID: <e038a984-2f6d-4940-8d28-e39e060b36c2@intel.com>
Date: Thu, 16 Apr 2020 10:43:08 +0300
From: Adrian Hunter <adrian.hunter@...el.com>
To: Michał Mirosław <mirq-linux@...e.qmqm.pl>
Cc: Michal Simek <michal.simek@...inx.com>,
Kevin Liu <kliu5@...vell.com>,
Suneel Garapati <suneel.garapati@...inx.com>,
Ulf Hansson <ulf.hansson@...aro.org>,
linux-kernel@...r.kernel.org, linux-mmc@...r.kernel.org
Subject: Re: [PATCH 4/7] mmc: sdhci: move SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN
frequency limit
On 15/04/20 7:16 pm, Michał Mirosław wrote:
> On Wed, Apr 15, 2020 at 04:16:04PM +0300, Adrian Hunter wrote:
>> On 2/04/20 2:54 pm, Michał Mirosław wrote:
>>> Move clock frequency limit for SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN where
>>> it belongs.
>>
>> Did you consider getting rid of SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN and
>> handling it in sdhci-of-arasan instead?
>
> I'm expecting to use this quirk for DDR mode support in other host drivers,
> but I can't test this, yet.
I didn't mean get rid of the functionality. I meant implement it in
sdhci-of-arasan. In general we want to reduce the quirks in sdhci.c and
implement them instead in vendor drivers.
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