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Message-Id: <1587470535-20469-1-git-send-email-shengjiu.wang@nxp.com>
Date:   Tue, 21 Apr 2020 20:02:15 +0800
From:   Shengjiu Wang <shengjiu.wang@....com>
To:     lgirdwood@...il.com, broonie@...nel.org, perex@...ex.cz,
        tiwai@...e.com, shengjiu.wang@....com, tglx@...utronix.de,
        allison@...utok.net, info@...ux.net, patches@...nsource.cirrus.com,
        alsa-devel@...a-project.org, linux-kernel@...r.kernel.org
Subject: [PATCH] ASoC: wm8962: restore the CLOCKING2 register in resume

The CLOCKING2 is a volatile register, but some bits should
be restored when resume, for example SYSCLK_SRC. otherwise
the output clock is wrong

Signed-off-by: Shengjiu Wang <shengjiu.wang@....com>
---
 sound/soc/codecs/wm8962.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/sound/soc/codecs/wm8962.c b/sound/soc/codecs/wm8962.c
index d9d59f45833f..6e96c0c5ad2a 100644
--- a/sound/soc/codecs/wm8962.c
+++ b/sound/soc/codecs/wm8962.c
@@ -82,6 +82,7 @@ struct wm8962_priv {
 #endif
 
 	int irq;
+	u32 regcache_clocking2;
 };
 
 /* We can't use the same notifier block for more than one supply and
@@ -3813,6 +3814,10 @@ static int wm8962_runtime_resume(struct device *dev)
 
 	regcache_sync(wm8962->regmap);
 
+	regmap_update_bits(wm8962->regmap, WM8962_CLOCKING2,
+			   WM8962_SYSCLK_SRC_MASK,
+			   wm8962->regcache_clocking2);
+
 	regmap_update_bits(wm8962->regmap, WM8962_ANTI_POP,
 			   WM8962_STARTUP_BIAS_ENA | WM8962_VMID_BUF_ENA,
 			   WM8962_STARTUP_BIAS_ENA | WM8962_VMID_BUF_ENA);
@@ -3842,6 +3847,9 @@ static int wm8962_runtime_suspend(struct device *dev)
 			   WM8962_STARTUP_BIAS_ENA |
 			   WM8962_VMID_BUF_ENA, 0);
 
+	regmap_read(wm8962->regmap, WM8962_CLOCKING2,
+		    &wm8962->regcache_clocking2);
+
 	regcache_cache_only(wm8962->regmap, true);
 
 	regulator_bulk_disable(ARRAY_SIZE(wm8962->supplies),
-- 
2.21.0

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