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Message-ID: <AM6PR04MB496640B6A28BBD8F491EB1C980AE0@AM6PR04MB4966.eurprd04.prod.outlook.com>
Date: Sun, 26 Apr 2020 03:51:38 +0000
From: Aisheng Dong <aisheng.dong@....com>
To: Peng Fan <peng.fan@....com>,
"shawnguo@...nel.org" <shawnguo@...nel.org>,
"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
Leonard Crestez <leonard.crestez@....com>,
"sboyd@...nel.org" <sboyd@...nel.org>,
Abel Vesa <abel.vesa@....com>
CC: "kernel@...gutronix.de" <kernel@...gutronix.de>,
"festevam@...il.com" <festevam@...il.com>,
dl-linux-imx <linux-imx@....com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Anson Huang <anson.huang@....com>,
Daniel Baluta <daniel.baluta@....com>,
"aford173@...il.com" <aford173@...il.com>,
Jacky Bai <ping.bai@....com>, Jun Li <jun.li@....com>,
"l.stach@...gutronix.de" <l.stach@...gutronix.de>,
"andrew.smirnov@...il.com" <andrew.smirnov@...il.com>,
"agx@...xcpu.org" <agx@...xcpu.org>,
"angus@...ea.ca" <angus@...ea.ca>,
"heiko@...ech.de" <heiko@...ech.de>,
Andy Duan <fugang.duan@....com>,
"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>
Subject: RE: [PATCH V2 01/10] arm64: dts: imx8m: assign clocks for A53
> From: Peng Fan <peng.fan@....com>
> Sent: Thursday, March 12, 2020 6:20 PM
>
> Assign IMX8M*_CLK_A53_SRC's parent to system pll1 and assign
> IMX8M*_CLK_A53_CORE's parent to arm pll out as what is done in
> drivers/clk/imx/clk-imx8m*.c, then we could remove the settings in driver which
> triggers lockdep warning.
>
> Reported-by: Leonard Crestez <leonard.crestez@....com>
> Signed-off-by: Peng Fan <peng.fan@....com>
Reviewed-by: Dong Aisheng <aisheng.dong@....com>
Regards
Aisheng
> ---
> arch/arm64/boot/dts/freescale/imx8mm.dtsi | 10 +++++++---
> arch/arm64/boot/dts/freescale/imx8mn.dtsi | 10 +++++++---
> arch/arm64/boot/dts/freescale/imx8mp.dtsi | 11 ++++++++---
> arch/arm64/boot/dts/freescale/imx8mq.dtsi | 9 +++++++--
> 4 files changed, 29 insertions(+), 11 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> index 2e5e7c4457db..8d2200224db4 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mm.dtsi
> @@ -471,16 +471,20 @@
> <&clk_ext3>, <&clk_ext4>;
> clock-names = "osc_32k", "osc_24m", "clk_ext1",
> "clk_ext2",
> "clk_ext3", "clk_ext4";
> - assigned-clocks = <&clk IMX8MM_CLK_NOC>,
> + assigned-clocks = <&clk IMX8MM_CLK_A53_SRC>,
> + <&clk IMX8MM_CLK_A53_CORE>,
> + <&clk IMX8MM_CLK_NOC>,
> <&clk IMX8MM_CLK_AUDIO_AHB>,
> <&clk IMX8MM_CLK_IPG_AUDIO_ROOT>,
> <&clk IMX8MM_SYS_PLL3>,
> <&clk IMX8MM_VIDEO_PLL1>,
> <&clk IMX8MM_AUDIO_PLL1>,
> <&clk IMX8MM_AUDIO_PLL2>;
> - assigned-clock-parents = <&clk IMX8MM_SYS_PLL3_OUT>,
> + assigned-clock-parents = <&clk
> IMX8MM_SYS_PLL1_800M>,
> + <&clk IMX8MM_ARM_PLL_OUT>,
> + <&clk IMX8MM_SYS_PLL3_OUT>,
> <&clk IMX8MM_SYS_PLL1_800M>;
> - assigned-clock-rates = <0>,
> + assigned-clock-rates = <0>, <0>, <0>,
> <400000000>,
> <400000000>,
> <750000000>,
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> index ff9c1ea38130..ad88ba3bf28c 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mn.dtsi
> @@ -380,13 +380,17 @@
> <&clk_ext3>, <&clk_ext4>;
> clock-names = "osc_32k", "osc_24m", "clk_ext1",
> "clk_ext2",
> "clk_ext3", "clk_ext4";
> - assigned-clocks = <&clk IMX8MN_CLK_NOC>,
> + assigned-clocks = <&clk IMX8MN_CLK_A53_SRC>,
> + <&clk IMX8MN_CLK_A53_CORE>,
> + <&clk IMX8MN_CLK_NOC>,
> <&clk IMX8MN_CLK_AUDIO_AHB>,
> <&clk IMX8MN_CLK_IPG_AUDIO_ROOT>,
> <&clk IMX8MN_SYS_PLL3>;
> - assigned-clock-parents = <&clk IMX8MN_SYS_PLL3_OUT>,
> + assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_800M>,
> + <&clk IMX8MN_ARM_PLL_OUT>,
> + <&clk IMX8MN_SYS_PLL3_OUT>,
> <&clk IMX8MN_SYS_PLL1_800M>;
> - assigned-clock-rates = <0>,
> + assigned-clock-rates = <0>, <0>, <0>,
> <400000000>,
> <400000000>,
> <600000000>;
> diff --git a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> index d92199bf6635..3a96082e8717 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mp.dtsi
> @@ -284,7 +284,9 @@
> <&clk_ext3>, <&clk_ext4>;
> clock-names = "osc_32k", "osc_24m", "clk_ext1",
> "clk_ext2",
> "clk_ext3", "clk_ext4";
> - assigned-clocks = <&clk IMX8MP_CLK_NOC>,
> + assigned-clocks = <&clk IMX8MP_CLK_A53_SRC>,
> + <&clk IMX8MP_CLK_A53_CORE>,
> + <&clk IMX8MP_CLK_NOC>,
> <&clk IMX8MP_CLK_NOC_IO>,
> <&clk IMX8MP_CLK_GIC>,
> <&clk IMX8MP_CLK_AUDIO_AHB>,
> @@ -292,12 +294,15 @@
> <&clk IMX8MP_CLK_IPG_AUDIO_ROOT>,
> <&clk IMX8MP_AUDIO_PLL1>,
> <&clk IMX8MP_AUDIO_PLL2>;
> - assigned-clock-parents = <&clk
> IMX8MP_SYS_PLL2_1000M>,
> + assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_800M>,
> + <&clk IMX8MP_ARM_PLL_OUT>,
> + <&clk IMX8MP_SYS_PLL2_1000M>,
> <&clk IMX8MP_SYS_PLL1_800M>,
> <&clk IMX8MP_SYS_PLL2_500M>,
> <&clk IMX8MP_SYS_PLL1_800M>,
> <&clk IMX8MP_SYS_PLL1_800M>;
> - assigned-clock-rates = <1000000000>,
> + assigned-clock-rates = <0>, <0>,
> + <1000000000>,
> <800000000>,
> <500000000>,
> <400000000>,
> diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> index 9bbdaf2d6e34..1f3ffc8c8a78 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi
> @@ -594,8 +594,13 @@
> clock-names = "ckil", "osc_25m", "osc_27m",
> "clk_ext1", "clk_ext2",
> "clk_ext3", "clk_ext4";
> - assigned-clocks = <&clk IMX8MQ_CLK_NOC>;
> - assigned-clock-rates = <800000000>;
> + assigned-clocks = <&clk IMX8MQ_CLK_A53_SRC>,
> + <&clk IMX8MQ_CLK_A53_CORE>,
> + <&clk IMX8MQ_CLK_NOC>;
> + assigned-clock-rates = <0>, <0>,
> + <800000000>;
> + assigned-clock-parents = <&clk
> IMX8MQ_SYS1_PLL_800M>,
> + <&clk IMX8MQ_ARM_PLL_OUT>;
> };
>
> src: reset-controller@...90000 {
> --
> 2.16.4
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