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Message-ID: <AM6PR04MB49667AF484D4609B5B5436B080AE0@AM6PR04MB4966.eurprd04.prod.outlook.com>
Date: Sun, 26 Apr 2020 03:54:32 +0000
From: Aisheng Dong <aisheng.dong@....com>
To: Peng Fan <peng.fan@....com>,
"shawnguo@...nel.org" <shawnguo@...nel.org>,
"s.hauer@...gutronix.de" <s.hauer@...gutronix.de>,
Leonard Crestez <leonard.crestez@....com>,
"sboyd@...nel.org" <sboyd@...nel.org>,
Abel Vesa <abel.vesa@....com>
CC: "kernel@...gutronix.de" <kernel@...gutronix.de>,
"festevam@...il.com" <festevam@...il.com>,
dl-linux-imx <linux-imx@....com>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Anson Huang <anson.huang@....com>,
Daniel Baluta <daniel.baluta@....com>,
"aford173@...il.com" <aford173@...il.com>,
Jacky Bai <ping.bai@....com>, Jun Li <jun.li@....com>,
"l.stach@...gutronix.de" <l.stach@...gutronix.de>,
"andrew.smirnov@...il.com" <andrew.smirnov@...il.com>,
"agx@...xcpu.org" <agx@...xcpu.org>,
"angus@...ea.ca" <angus@...ea.ca>,
"heiko@...ech.de" <heiko@...ech.de>,
Andy Duan <fugang.duan@....com>,
"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>
Subject: RE: [PATCH V2 02/10] clk: imx8m: drop clk_hw_set_parent for A53
> From: Peng Fan <peng.fan@....com>
> Sent: Thursday, March 12, 2020 6:20 PM
>
> The parent settings have been moved to dtsi, we no need to set parent here. And
> clk_hw_set_parent will trigger lockdep warning, because this api not have
> prepare_lock.
>
> Reported-by: Leonard Crestez <leonard.crestez@....com>
> Signed-off-by: Peng Fan <peng.fan@....com>
For the patch:
Reviewed-by: Dong Aisheng <aisheng.dong@....com>
BTW, What kind of lockdep warning?
Do you mean it's generic issue that we can't use clk_hw_set_parent in clock driver?
Regards
Aisheng
> ---
> drivers/clk/imx/clk-imx8mm.c | 3 ---
> drivers/clk/imx/clk-imx8mn.c | 3 ---
> drivers/clk/imx/clk-imx8mp.c | 3 ---
> drivers/clk/imx/clk-imx8mq.c | 3 ---
> 4 files changed, 12 deletions(-)
>
> diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c index
> 925670438f23..5435042a06e3 100644
> --- a/drivers/clk/imx/clk-imx8mm.c
> +++ b/drivers/clk/imx/clk-imx8mm.c
> @@ -614,9 +614,6 @@ static int imx8mm_clocks_probe(struct
> platform_device *pdev)
> hws[IMX8MM_ARM_PLL_OUT]->clk,
> hws[IMX8MM_CLK_A53_DIV]->clk);
>
> - clk_hw_set_parent(hws[IMX8MM_CLK_A53_SRC],
> hws[IMX8MM_SYS_PLL1_800M]);
> - clk_hw_set_parent(hws[IMX8MM_CLK_A53_CORE],
> hws[IMX8MM_ARM_PLL_OUT]);
> -
> imx_check_clk_hws(hws, IMX8MM_CLK_END);
>
> ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_hw_data);
> diff --git a/drivers/clk/imx/clk-imx8mn.c b/drivers/clk/imx/clk-imx8mn.c index
> 0bc7070235bd..6cac6ca03e12 100644
> --- a/drivers/clk/imx/clk-imx8mn.c
> +++ b/drivers/clk/imx/clk-imx8mn.c
> @@ -565,9 +565,6 @@ static int imx8mn_clocks_probe(struct platform_device
> *pdev)
> hws[IMX8MN_ARM_PLL_OUT]->clk,
> hws[IMX8MN_CLK_A53_DIV]->clk);
>
> - clk_hw_set_parent(hws[IMX8MN_CLK_A53_SRC],
> hws[IMX8MN_SYS_PLL1_800M]);
> - clk_hw_set_parent(hws[IMX8MN_CLK_A53_CORE],
> hws[IMX8MN_ARM_PLL_OUT]);
> -
> imx_check_clk_hws(hws, IMX8MN_CLK_END);
>
> ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_hw_data);
> diff --git a/drivers/clk/imx/clk-imx8mp.c b/drivers/clk/imx/clk-imx8mp.c index
> 41469e2cc3de..e05ec56df285 100644
> --- a/drivers/clk/imx/clk-imx8mp.c
> +++ b/drivers/clk/imx/clk-imx8mp.c
> @@ -735,9 +735,6 @@ static int imx8mp_clocks_probe(struct platform_device
> *pdev)
> hws[IMX8MP_ARM_PLL_OUT]->clk,
> hws[IMX8MP_CLK_A53_DIV]->clk);
>
> - clk_hw_set_parent(hws[IMX8MP_CLK_A53_SRC],
> hws[IMX8MP_SYS_PLL1_800M]);
> - clk_hw_set_parent(hws[IMX8MP_CLK_A53_CORE],
> hws[IMX8MP_ARM_PLL_OUT]);
> -
> imx_check_clk_hws(hws, IMX8MP_CLK_END);
>
> of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_hw_data); diff
> --git a/drivers/clk/imx/clk-imx8mq.c b/drivers/clk/imx/clk-imx8mq.c index
> fdc68db68de5..201c7bbb201f 100644
> --- a/drivers/clk/imx/clk-imx8mq.c
> +++ b/drivers/clk/imx/clk-imx8mq.c
> @@ -599,9 +599,6 @@ static int imx8mq_clocks_probe(struct platform_device
> *pdev)
> hws[IMX8MQ_ARM_PLL_OUT]->clk,
> hws[IMX8MQ_CLK_A53_DIV]->clk);
>
> - clk_hw_set_parent(hws[IMX8MQ_CLK_A53_SRC],
> hws[IMX8MQ_SYS1_PLL_800M]);
> - clk_hw_set_parent(hws[IMX8MQ_CLK_A53_CORE],
> hws[IMX8MQ_ARM_PLL_OUT]);
> -
> imx_check_clk_hws(hws, IMX8MQ_CLK_END);
>
> err = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, clk_hw_data);
> --
> 2.16.4
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