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Date: Mon, 27 Apr 2020 08:58:37 +0200 From: Ulf Hansson <ulf.hansson@...aro.org> To: Martin Blumenstingl <martin.blumenstingl@...glemail.com> Cc: "open list:ARM/Amlogic Meson..." <linux-amlogic@...ts.infradead.org>, "linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>, DTML <devicetree@...r.kernel.org>, Rob Herring <robh+dt@...nel.org>, Jianxin Pan <jianxin.pan@...ogic.com>, Mark Rutland <mark.rutland@....com>, Linux Kernel Mailing List <linux-kernel@...r.kernel.org>, Linux ARM <linux-arm-kernel@...ts.infradead.org>, lnykww@...il.com, yinxin_1989@...yun.com, Jerome Brunet <jbrunet@...libre.com> Subject: Re: [PATCH v5 0/3] Amlogic 32-bit Meson SoC SDHC MMC controller driver On Sat, 25 Apr 2020 at 22:27, Martin Blumenstingl <martin.blumenstingl@...glemail.com> wrote: > > Hi Ulf, > > On Sat, Mar 28, 2020 at 1:33 AM Martin Blumenstingl > <martin.blumenstingl@...glemail.com> wrote: > [...] > > Martin Blumenstingl (3): > > dt-bindings: mmc: Document the Amlogic Meson SDHC MMC host controller > > clk: meson: add a driver for the Meson8/8b/8m2 SDHC clock controller > > mmc: host: meson-mx-sdhc: new driver for the Amlogic Meson SDHC host > I have Rob's reviewed-by for the dt-bindings patch and three > tested-by's for the MMC driver in patch #3 (which means that patch #2 > was implicitly tested as well) > I tried to answer all your previous questions where possible, but for > some of your questions I simply don't have an answer. > > is there anything from your side which is holding this driver back > from being merged? Apologize for the delay. I will have a look asap. > > +Cc Jerome, because he is the maintainer of the Amlogic clock > controller drivers - where this series adds another one, so we need to > coordinate where patches go. It seems like you may need to resend the series so the clock maintainers (Stephen and Jerome) can get a look as well. Perhaps it's better if the series is queued together - and can help to do that, but then I need acks from Stephen/Jerome for the clock patch. Kind regards Uffe
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