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Message-ID: <87pnbtqhr1.fsf@nanos.tec.linutronix.de>
Date: Mon, 27 Apr 2020 13:40:18 +0200
From: Thomas Gleixner <tglx@...utronix.de>
To: Michael Walle <michael@...le.cc>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-hwmon@...r.kernel.org,
linux-pwm@...r.kernel.org, linux-watchdog@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Cc: Linus Walleij <linus.walleij@...aro.org>,
Bartosz Golaszewski <bgolaszewski@...libre.com>,
Rob Herring <robh+dt@...nel.org>,
Jean Delvare <jdelvare@...e.com>,
Guenter Roeck <linux@...ck-us.net>,
Lee Jones <lee.jones@...aro.org>,
Thierry Reding <thierry.reding@...il.com>,
Uwe Kleine-König
<u.kleine-koenig@...gutronix.de>,
Wim Van Sebroeck <wim@...ux-watchdog.org>,
Shawn Guo <shawnguo@...nel.org>, Li Yang <leoyang.li@....com>,
Jason Cooper <jason@...edaemon.net>,
Marc Zyngier <maz@...nel.org>, Mark Brown <broonie@...nel.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Michael Walle <michael@...le.cc>
Subject: Re: [PATCH v3 06/16] irqchip: add sl28cpld interrupt controller support
Michael Walle <michael@...le.cc> writes:
> This patch adds support for the interrupt controller inside the sl28
git grep 'This patch' Documentation/process/
> CPLD management controller.
>
> +static int sl28cpld_intc_probe(struct platform_device *pdev)
> +{
> + struct sl28cpld_intc *irqchip;
> + struct resource *res;
> + unsigned int irq;
> + int ret;
> +
> + if (!pdev->dev.parent)
> + return -ENODEV;
> +
> + irqchip = devm_kzalloc(&pdev->dev, sizeof(*irqchip), GFP_KERNEL);
> + if (!irqchip)
> + return -ENOMEM;
> +
> + irqchip->regmap = dev_get_regmap(pdev->dev.parent, NULL);
> + if (!irqchip->regmap)
> + return -ENODEV;
> +
> + irq = platform_get_irq(pdev, 0);
> + if (irq < 0)
> + return irq;
> +
> + res = platform_get_resource(pdev, IORESOURCE_REG, 0);
> + if (!res)
> + return -EINVAL;
> +
> + irqchip->chip.name = "sl28cpld-intc";
> + irqchip->chip.irqs = sl28cpld_irqs;
> + irqchip->chip.num_irqs = ARRAY_SIZE(sl28cpld_irqs);
> + irqchip->chip.num_regs = 1;
> + irqchip->chip.status_base = res->start + INTC_IP;
> + irqchip->chip.mask_base = res->start + INTC_IE;
> + irqchip->chip.mask_invert = true,
> + irqchip->chip.ack_base = res->start + INTC_IP;
> +
> + ret = devm_regmap_add_irq_chip(&pdev->dev, irqchip->regmap, irq,
> + IRQF_SHARED | IRQF_ONESHOT, 0,
What's the point of IRQF_SHARED | IRQF_ONESHOT here?
> + &irqchip->chip, &irqchip->irq_data);
Thanks,
tglx
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