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Message-ID: <OF18214CA5.6A9B2B30-ON48258558.001D894C-48258558.002249E0@mxic.com.tw>
Date: Tue, 28 Apr 2020 14:14:31 +0800
From: masonccyang@...c.com.tw
To: "Pratyush Yadav" <me@...avpratyush.com>
Cc: "Boris Brezillon" <boris.brezillon@...labora.com>,
broonie@...nel.org, juliensu@...c.com.tw,
linux-kernel@...r.kernel.org, linux-mtd@...ts.infradead.org,
linux-spi@...r.kernel.org, miquel.raynal@...tlin.com,
"Pratyush Yadav" <p.yadav@...com>, richard@....at,
tudor.ambarus@...rochip.com, vigneshr@...com
Subject: Re: [PATCH v2 0/5] mtd: spi-nor: Add support for Octal 8D-8D-8D mode
Hi Pratyush,
> > On Tue, 21 Apr 2020 14:39:42 +0800
> > Mason Yang <masonccyang@...c.com.tw> wrote:
> >
> > > Hello,
> > >
> > > This is repost of patchset from Boris Brezillon's
> > > [RFC,00/18] mtd: spi-nor: Proposal for 8-8-8 mode support [1].
> >
> > I only quickly went through the patches you sent and saying it's a
> > repost of the RFC is a bit of a lie. You completely ignored the state
> > tracking I was trying to do to avoid leaving the flash in 8D mode when
> > suspending/resetting the board, and I think that part is crucial. If I
> > remember correctly, we already had this discussion so I must say I'm a
> > bit disappointed.
> >
> > Can you sync with Pratyush? I think his series [1] is better in that
it
> > tries to restore the flash in single-SPI mode before suspend (it's
> > missing the shutdown case, but that can be easily added I think). Of
> > course that'd be even better to have proper state tracking at the SPI
> > NOR level.
>
> Hi Mason,
>
> I posted a re-roll of my series here [0]. Could you please base your
> changes on top of it? Let me know if the series is missing something you
> need.
>
> [0]
https://lore.kernel.org/linux-mtd/20200424184410.8578-1-p.yadav@ti.com/
Our mx25uw51245g supports BFPT DWORD-18,19 and 20 data and xSPI profile
1.0,
and it comply with BFPT DWORD-19, octal mode enable sequences by write CFG
Reg2
with instruction 0x72. Therefore, I can't apply your patches.
I quickly went through your patches but can't reply them in each your
patches.
i.e,.
1) [v4,03/16] spi: spi-mem: allow specifying a command's extension
- u8 opcode;
+ u16 opcode;
big/little Endian issue, right?
why not just u8 ext_opcode;
No any impact for exist code and actually only xSPI device use extension
command.
2) [v4,08/16] mtd: spi-nor: parse xSPI Profile 1.0 table
need extract more data from xSPI profile 1.0 table and no other specific
setting.
3) [v4,11/16] mtd: spi-nor: enable octal DTR mode when possible
+static int spi_nor_octal_dtr_enable(struct spi_nor *nor, bool enable)
+{
+ int ret;
+
+ if (!nor->params->octal_dtr_enable)
+ return 0;
+
+ if (!(spi_nor_get_protocol_width(nor->read_proto) == 8 ||
+ spi_nor_get_protocol_width(nor->write_proto) == 8))
+ return 0;
+
+ ret = nor->params->octal_dtr_enable(nor, enable);
+ if (ret)
+ return ret;
+
+ if (enable)
+ nor->reg_proto = SNOR_PROTO_8_8_8_DTR;
+ else
+ nor->reg_proto = SNOR_PROTO_1_1_1;
+
+ return 0;
+}
+
it seems you enable device in Octal mode after SPI-NOR Framework is
already
in Octal protocol.
Driver should set device by SPI 1-1-1 mode to enter Octal mode and then
setup
Read/PP command and protocol by spi_nor_set_read/pp_setting() for Octal
mode,
right ?
thanks & best regards,
Mason
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