lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <b15f2577-8a7d-4c18-1633-d47133247f49@ti.com>
Date:   Tue, 28 Apr 2020 10:37:43 +0300
From:   Grygorii Strashko <grygorii.strashko@...com>
To:     Drew Fustini <drew@...gleboard.org>,
        BenoƮt Cousson <bcousson@...libre.com>,
        Tony Lindgren <tony@...mide.com>,
        Rob Herring <robh+dt@...nel.org>, <linux-omap@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        Jason Kridner <jkridner@...gleboard.org>,
        Robert Nelson <robertcnelson@...gleboard.org>
Subject: Re: [PATCH] arm: dts: am33xx-l4: add gpio-line-names to gpio
 controllers



On 28/04/2020 02:31, Drew Fustini wrote:
> Add gpio-line-names properties to the gpio controller nodes.  The names
> correspond to the AM335x pin names which are also the muxmode 0 signal
> names.  Refer to "Table 4-2. Pin Attributes" in the TI AM335x Sitara
> Processors datasheet:
> 
> http://www.ti.com/lit/ds/symlink/am3358.pdf
> 
> 
> Signed-off-by: Drew Fustini <drew@...gleboard.org>
> ---
>   arch/arm/boot/dts/am33xx-l4.dtsi | 134 +++++++++++++++++++++++++++++++
>   1 file changed, 134 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/am33xx-l4.dtsi b/arch/arm/boot/dts/am33xx-l4.dtsi
> index 5ed7f3c58c0f..1ac574ebfe74 100644
> --- a/arch/arm/boot/dts/am33xx-l4.dtsi
> +++ b/arch/arm/boot/dts/am33xx-l4.dtsi
> @@ -157,6 +157,39 @@
>   				#interrupt-cells = <2>;
>   				reg = <0x0 0x1000>;
>   				interrupts = <96>;
> +				gpio-line-names =
> +					"MDIO_DATA",
> +					"MDIO_CLK",
> +					"SPI0_SCLK",
> +					"SPI0_D0",
> +					"SPI0_D1",
> +					"SPI0_CS0",
> +					"SPI0_CS1",
> +					"ECAP0_IN_PWM0_OUT",
> +					"LCD_DATA12",
> +					"LCD_DATA13",
> +					"LCD_DATA14",
> +					"LCD_DATA15",
> +					"UART1_CTSN",
> +					"UART1_RTSN",
> +					"UART1_RXD",
> +					"UART1_TXD",
> +					"GMII1_TXD3",
> +					"GMII1_TXD2",
> +					"USB0_DRVVBUS",
> +					"XDMA_EVENT_INTR0",
> +					"XDMA_EVENT_INTR1",
> +					"GMII1_TXD1",
> +					"GPMC_AD8",
> +					"GPMC_AD9",
> +					"NC",
> +					"NC",
> +					"GPMC_AD10",
> +					"GPMC_AD11",
> +					"GMII1_TXD0",
> +					"RMII1_REFCLK",
> +					"GPMC_WAIT0",
> +					"GPMC_WPN";
>   			};
This misuse GPIO DT bindings:
"
Optionally, a GPIO controller may have a "gpio-line-names" property. This is
an array of strings defining the names of the GPIO lines going out of the
GPIO controller. This name should be the most meaningful producer name
for the system, such as a rail name indicating the usage. Package names
such as pin name are discouraged: such lines have opaque names (since they
are by definition generic purpose) and such names are usually not very
helpful. For example "MMC-CD", "Red LED Vdd" and "ethernet reset" are
reasonable line names as they describe what the line is used for. "GPIO0"
is not a good name to give to a GPIO line. Placeholders are discouraged:
rather use the "" (blank string) if the use of the GPIO line is undefined
in your design. The names are assigned starting from line offset 0 from
left to right from the passed array. An incomplete array (where the number
of passed named are less than ngpios) will still be used up until the last
provided valid line index.
"


Additional note. On other TI SoCs like am437x the same gpio line can be routed to more
than one pin (but only one pin can be used).
gpio0_0 GPIO IO -> A17, D16


-- 
Best regards,
grygorii

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ