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Message-ID: <20200427233116.GA18917@x1>
Date: Tue, 28 Apr 2020 01:31:16 +0200
From: Drew Fustini <drew@...gleboard.org>
To: Benoît Cousson <bcousson@...libre.com>,
Tony Lindgren <tony@...mide.com>,
Rob Herring <robh+dt@...nel.org>, linux-omap@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Jason Kridner <jkridner@...gleboard.org>,
Robert Nelson <robertcnelson@...gleboard.org>
Subject: [PATCH] arm: dts: am33xx-l4: add gpio-line-names to gpio controllers
Add gpio-line-names properties to the gpio controller nodes. The names
correspond to the AM335x pin names which are also the muxmode 0 signal
names. Refer to "Table 4-2. Pin Attributes" in the TI AM335x Sitara
Processors datasheet:
http://www.ti.com/lit/ds/symlink/am3358.pdf
Signed-off-by: Drew Fustini <drew@...gleboard.org>
---
arch/arm/boot/dts/am33xx-l4.dtsi | 134 +++++++++++++++++++++++++++++++
1 file changed, 134 insertions(+)
diff --git a/arch/arm/boot/dts/am33xx-l4.dtsi b/arch/arm/boot/dts/am33xx-l4.dtsi
index 5ed7f3c58c0f..1ac574ebfe74 100644
--- a/arch/arm/boot/dts/am33xx-l4.dtsi
+++ b/arch/arm/boot/dts/am33xx-l4.dtsi
@@ -157,6 +157,39 @@
#interrupt-cells = <2>;
reg = <0x0 0x1000>;
interrupts = <96>;
+ gpio-line-names =
+ "MDIO_DATA",
+ "MDIO_CLK",
+ "SPI0_SCLK",
+ "SPI0_D0",
+ "SPI0_D1",
+ "SPI0_CS0",
+ "SPI0_CS1",
+ "ECAP0_IN_PWM0_OUT",
+ "LCD_DATA12",
+ "LCD_DATA13",
+ "LCD_DATA14",
+ "LCD_DATA15",
+ "UART1_CTSN",
+ "UART1_RTSN",
+ "UART1_RXD",
+ "UART1_TXD",
+ "GMII1_TXD3",
+ "GMII1_TXD2",
+ "USB0_DRVVBUS",
+ "XDMA_EVENT_INTR0",
+ "XDMA_EVENT_INTR1",
+ "GMII1_TXD1",
+ "GPMC_AD8",
+ "GPMC_AD9",
+ "NC",
+ "NC",
+ "GPMC_AD10",
+ "GPMC_AD11",
+ "GMII1_TXD0",
+ "RMII1_REFCLK",
+ "GPMC_WAIT0",
+ "GPMC_WPN";
};
};
@@ -1304,6 +1337,39 @@
#interrupt-cells = <2>;
reg = <0x0 0x1000>;
interrupts = <98>;
+ gpio-line-names =
+ "GPMC_AD0",
+ "GPMC_AD1",
+ "GPMC_AD2",
+ "GPMC_AD3",
+ "GPMC_AD4",
+ "GPMC_AD5",
+ "GPMC_AD6",
+ "GPMC_AD7",
+ "UART0_CTSN",
+ "UART0_RTSN",
+ "UART0_RXD",
+ "UART0_TXD",
+ "GPMC_AD12",
+ "GPMC_AD13",
+ "GPMC_AD14",
+ "GPMC_AD15",
+ "GPMC_A0",
+ "GPMC_A1",
+ "GPMC_A2",
+ "GPMC_A3",
+ "GPMC_A4",
+ "GPMC_A5",
+ "GPMC_A6",
+ "GPMC_A7",
+ "GPMC_A8",
+ "GPMC_A9",
+ "GPMC_A10",
+ "GPMC_A11",
+ "GPMC_BE1N",
+ "GPMC_CSN0",
+ "GPMC_CSN1",
+ "GPMC_CSN2";
};
};
@@ -1706,6 +1772,40 @@
#interrupt-cells = <2>;
reg = <0x0 0x1000>;
interrupts = <32>;
+ gpio-line-names =
+ "GPMC_CSN3",
+ "GPMC_CLK",
+ "GPMC_ADVN_ALE",
+ "GPMC_OEN_REN",
+ "GPMC_WEN",
+ "GPMC_BE0N_CLE",
+ "LCD_DATA0",
+ "LCD_DATA1",
+ "LCD_DATA2",
+ "LCD_DATA3",
+ "LCD_DATA4",
+ "LCD_DATA5",
+ "LCD_DATA6",
+ "LCD_DATA7",
+ "LCD_DATA8",
+ "LCD_DATA9",
+ "LCD_DATA10",
+ "LCD_DATA11",
+ "GMII1_RXD3",
+ "GMII1_RXD2",
+ "GMII1_RXD1",
+ "GMII1_RXD0",
+ "LCD_VSYNC",
+ "LCD_HSYNC",
+ "LCD_PCLK",
+ "LCD_AC_BIAS_EN",
+ "MMC0_DAT3",
+ "MMC0_DAT2",
+ "MMC0_DAT1",
+ "MMC0_DAT0",
+ "MMC0_CLK",
+ "MMC0_CMD";
+
};
};
@@ -1739,6 +1839,40 @@
#interrupt-cells = <2>;
reg = <0x0 0x1000>;
interrupts = <62>;
+ gpio-line-names =
+ "GMII1_COL",
+ "GMII1_CRS",
+ "GMII1_RXER",
+ "GMII1_TXEN",
+ "GMII1_RXDV",
+ "I2C0_SDA",
+ "I2C0_SCL",
+ "EMU0",
+ "EMU1",
+ "GMII1_TXCLK",
+ "GMII1_RXCLK",
+ "NC",
+ "NC",
+ "USB1_DRVVBUS",
+ "MCASP0_ACLKX",
+ "MCASP0_FSX",
+ "MCASP0_AXR0",
+ "MCASP0_AHCLKR",
+ "MCASP0_ACLKR",
+ "MCASP0_FSR",
+ "MCASP0_AXR1",
+ "MCASP0_AHCLKX",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC",
+ "NC";
+
};
};
--
2.20.1
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