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Message-ID: <b6b31f36-8e8f-4042-2587-0dcad82aafc5@st.com>
Date:   Wed, 29 Apr 2020 11:41:44 +0200
From:   Christophe Kerello <christophe.kerello@...com>
To:     Miquel Raynal <miquel.raynal@...tlin.com>
CC:     <richard@....at>, <vigneshr@...com>, <lee.jones@...aro.org>,
        <robh+dt@...nel.org>, <mark.rutland@....com>, <tony@...mide.com>,
        <linux-mtd@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
        <linux-stm32@...md-mailman.stormreply.com>,
        <devicetree@...r.kernel.org>, <marex@...x.de>
Subject: Re: [PATCH v2 06/12] mtd: rawnand: stm32_fmc2: use FMC2_TIMEOUT_MS
 for timeouts



On 4/29/20 11:35 AM, Miquel Raynal wrote:
> Hi Christophe,
> 
> Christophe Kerello <christophe.kerello@...com> wrote on Wed, 29 Apr
> 2020 11:27:43 +0200:
> 
>> Hi Miquèl,
>>
>> On 4/27/20 8:22 PM, Miquel Raynal wrote:
>>> Hi Christophe,
>>>
>>> Christophe Kerello <christophe.kerello@...com> wrote on Wed, 15 Apr
>>> 2020 17:57:30 +0200:
>>>    
>>>> This patch removes the constant FMC2_TIMEOUT_US.
>>>> FMC2_TIMEOUT_MS is set to 5 seconds and this constant is used
>>>> each time that we need to wait (except when the timeout value
>>>> is set by the framework)
>>>>
>>>> Signed-off-by: Christophe Kerello <christophe.kerello@...com>
>>>> ---
>>>>    drivers/mtd/nand/raw/stm32_fmc2_nand.c | 11 +++++------
>>>>    1 file changed, 5 insertions(+), 6 deletions(-)
>>>>
>>>> diff --git a/drivers/mtd/nand/raw/stm32_fmc2_nand.c b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
>>>> index ab53314..f159c39 100644
>>>> --- a/drivers/mtd/nand/raw/stm32_fmc2_nand.c
>>>> +++ b/drivers/mtd/nand/raw/stm32_fmc2_nand.c
>>>> @@ -37,8 +37,7 @@
>>>>    /* Max ECC buffer length */
>>>>    #define FMC2_MAX_ECC_BUF_LEN		(FMC2_BCHDSRS_LEN * FMC2_MAX_SG)
>>>>    >> -#define FMC2_TIMEOUT_US			1000
>>>> -#define FMC2_TIMEOUT_MS			1000
>>>> +#define FMC2_TIMEOUT_MS			5000
>>>>    >>   /* Timings */
>>>>    #define FMC2_THIZ			1
>>>> @@ -525,9 +524,9 @@ static int stm32_fmc2_ham_calculate(struct nand_chip *chip, const u8 *data,
>>>>    	u32 sr, heccr;
>>>>    	int ret;
>>>>    >> -	ret = readl_relaxed_poll_timeout(fmc2->io_base + FMC2_SR,
>>>> -					 sr, sr & FMC2_SR_NWRF, 10,
>>>> -					 FMC2_TIMEOUT_MS);
>>>> +	ret = readl_relaxed_poll_timeout_atomic(fmc2->io_base + FMC2_SR,
>>>> +						sr, sr & FMC2_SR_NWRF, 1,
>>>> +						1000 * FMC2_TIMEOUT_MS);
>>>
>>> Is the _atomic suffix needed here? If yes it would deserve a separate
>>> patch with Fixes/Stable tags.
>>>    
>>
>> I have currently not seen any issues. So, I will remove this modification as we will move to regmap_read_poll_timeout in patch 10.
>>
>>>>    	if (ret) {
>>>>    		dev_err(fmc2->dev, "ham timeout\n");
>>>>    		return ret;
>>>> @@ -1315,7 +1314,7 @@ static int stm32_fmc2_waitrdy(struct nand_chip *chip, unsigned long timeout_ms)
>>>>    	/* Check if there is no pending requests to the NAND flash */
>>>>    	if (readl_relaxed_poll_timeout_atomic(fmc2->io_base + FMC2_SR, sr,
>>>>    					      sr & FMC2_SR_NWRF, 1,
>>>> -					      FMC2_TIMEOUT_US))
>>>> +					      1000 * FMC2_TIMEOUT_MS))
>>>>    		dev_warn(fmc2->dev, "Waitrdy timeout\n");
>>>>    >>   	/* Wait tWB before R/B# signal is low */
>>>
>>> You change the timeouts from 1ms to 5s.
>>>
>>> Maybe 5s is a little bit too much IMHO but we don't really care as this
>>> is a timeout. However 1ms is tight. If you are changing this value
>>> because it triggers error (eg. when the machine is loaded), then it is
>>> a fix and should appear like it.
>>>
>>> Thanks,
>>> Miquèl
>>>    
>>
>> No errors currently happens.
>> During our stress tests, in a overloaded system, we have seen that we could be close to 1 second, even if we never met this value.
>> So, to be safe, I have set this timeout to 5 seconds.
>> As it is just a timeout value, I have not seen any side effect.
>> I am using the same timeout constant to avoid to have one timeout per cases.
> 
> Something is wrong in my mind:
> You say you observe delays of almost up to 1 second, but the polling
> currently happens on 1000 us = 1ms, either you had timeouts or I
> misread something?
> 
> Thanks,
> Miquèl
> 

Hi Miquèl,

My fault. For this polling, we never met 1 ms.
The 1 second observed was on the sequencer when we read/write a page (as 
it the same timeout value that is used)

Regards,
Christophe Kerello.

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