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Message-ID: <20200506051134.mrm4nuqxssw255tl@pengutronix.de>
Date: Wed, 6 May 2020 07:11:34 +0200
From: Oleksij Rempel <o.rempel@...gutronix.de>
To: Andrew Lunn <andrew@...n.ch>
Cc: Florian Fainelli <f.fainelli@...il.com>,
Heiner Kallweit <hkallweit1@...il.com>,
Mark Rutland <mark.rutland@....com>,
Rob Herring <robh+dt@...nel.org>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
linux-kernel@...r.kernel.org,
"David S. Miller" <davem@...emloft.net>, netdev@...r.kernel.org,
Marek Vasut <marex@...x.de>, David Jander <david@...tonic.nl>,
devicetree@...r.kernel.org
Subject: Re: [PATCH v1] dt-bindings: net: nxp,tja11xx: rework validation
support
On Tue, May 05, 2020 at 04:01:27PM +0200, Andrew Lunn wrote:
> On Tue, May 05, 2020 at 12:42:15PM +0200, Oleksij Rempel wrote:
> > To properly identify this node, we need to use ethernet-phy-id0180.dc80.
> > And add missing required properties.
> >
> > Signed-off-by: Oleksij Rempel <o.rempel@...gutronix.de>
> > ---
> > .../devicetree/bindings/net/nxp,tja11xx.yaml | 55 ++++++++++++-------
> > 1 file changed, 35 insertions(+), 20 deletions(-)
> >
> > diff --git a/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml b/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml
> > index 42be0255512b3..cc322107a24a2 100644
> > --- a/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml
> > +++ b/Documentation/devicetree/bindings/net/nxp,tja11xx.yaml
> > @@ -1,4 +1,4 @@
> > -# SPDX-License-Identifier: GPL-2.0+
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > %YAML 1.2
> > ---
> > $id: http://devicetree.org/schemas/net/nxp,tja11xx.yaml#
> > @@ -12,44 +12,59 @@ maintainers:
> > - Heiner Kallweit <hkallweit1@...il.com>
> >
> > description:
> > - Bindings for NXP TJA11xx automotive PHYs
> > + Bindings for the NXP TJA1102 automotive PHY. This is a dual PHY package where
> > + only the first PHY has global configuration register and HW health
> > + monitoring.
> >
> > -allOf:
> > - - $ref: ethernet-phy.yaml#
> > +properties:
> > + compatible:
> > + const: ethernet-phy-id0180.dc80
> > + description: ethernet-phy-id0180.dc80 used for TJA1102 PHY
> > +
> > + reg:
> > + minimum: 0
> > + maximum: 14
> > + description:
> > + The PHY address of the parent PHY.
>
> Hi Oleksij
>
> reg is normally 0 to 31, since that is the address range for MDIO.
> Did you use 14 here because of what strapping allows?
Yes. Only BITs 1:3 are configurable. BIT(0) is always 0 for the PHY0 and 1
for the PHY1
> > +required:
> > + - compatible
> > + - reg
> > + - '#address-cells'
> > + - '#size-cells'
>
> So we have two different meanings of 'required' here.
>
> One meaning is the code requires it. compatible is not required, the
> driver will correctly be bind to the device based on its ID registers.
> Is reg also required by the code?
>
> The second meaning is about keeping the yaml verifier happy. It seems
> like compatible is needed for the verifier. Is reg also required? We
> do recommend having reg, but the generic code does not require it.
reg is used by:
tja1102_p0_probe()
tja1102_p1_register()
of_mdio_parse_addr()
But this is required for the slave PHY. I assume the reg can be
optional for the master PHY. Should I?
Regards,
Oleksij
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