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Message-ID: <20200508164703.0000481d@intel.com>
Date:   Fri, 8 May 2020 16:47:03 -0700
From:   Jesse Brandeburg <jesse.brandeburg@...el.com>
To:     Nathan Chancellor <natechancellor@...il.com>
Cc:     Nick Desaulniers <ndesaulniers@...gle.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        Sedat Dilek <sedat.dilek@...il.com>,
        "kernelci . org bot" <bot@...nelci.org>,
        Andy Shevchenko <andriy.shevchenko@...el.com>,
        Brian Gerst <brgerst@...il.com>,
        "H . Peter Anvin" <hpa@...or.com>,
        "Ilie Halip" <ilie.halip@...il.com>, <x86@...nel.org>,
        Marco Elver <elver@...gle.com>,
        "Paul E. McKenney" <paulmck@...nel.org>,
        Andrey Ryabinin <aryabinin@...tuozzo.com>,
        Luc Van Oostenryck <luc.vanoostenryck@...il.com>,
        Andrew Morton <akpm@...ux-foundation.org>,
        Masahiro Yamada <yamada.masahiro@...ionext.com>,
        Daniel Axtens <dja@...ens.net>,
        "Peter Zijlstra (Intel)" <peterz@...radead.org>,
        <linux-kernel@...r.kernel.org>,
        <clang-built-linux@...glegroups.com>
Subject: Re: [PATCH v5] x86: bitops: fix build regression

On Fri, 8 May 2020 13:28:35 -0700
Nathan Chancellor <natechancellor@...il.com> wrote:

> On Fri, May 08, 2020 at 11:32:29AM -0700, Nick Desaulniers wrote:
> > Use the `%b` "x86 Operand Modifier" to instead force register allocation
> > to select a lower-8-bit GPR operand.

This looks OK to me, I appreciate the work done to find the right
fix and clean up the code while not breaking sparse! I had a look at
the assembly from gcc 9.3.1 and it looks good. Thanks!

Reviewed-by: Jesse Brandeburg <jesse.brandeburg@...el.com>

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