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Date:   Tue, 12 May 2020 15:45:21 +0800
From:   Jiaxun Yang <jiaxun.yang@...goat.com>
To:     maz@...nel.org
Cc:     Thomas Gleixner <tglx@...utronix.de>,
        Jason Cooper <jason@...edaemon.net>,
        Rob Herring <robh+dt@...nel.org>,
        Huacai Chen <chenhc@...ote.com>, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, linux-mips@...r.kernel.org
Subject: Re: [PATCH v3 1/6] irqchip: Add Loongson HyperTransport Vector
 support

On Fri,  1 May 2020 17:21:32 +0800
Jiaxun Yang <jiaxun.yang@...goat.com> wrote:

> This controller appears on Loongson-3 chips for receiving interrupt
> vectors from PCH's PIC and PCH's PCIe MSI interrupts.
> 
> Signed-off-by: Jiaxun Yang <jiaxun.yang@...goat.com>
> ---
> v2:
> 	- Style cleanup
> 	- Set ack callback and set correct edge_irq handler
> 
> v3:
> 	- Correct bitops in ACK callback

Any update about v3?

Thanks.

[...]
--
Jiaxun Yang

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