linux-kernel - Re: [PATCH v2 12/19] spi: dw: Fix Rx-only DMA transfers

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Message-ID: <20200515165542.GK5066@sirena.org.uk>
Date:   Fri, 15 May 2020 17:55:42 +0100
From:   Mark Brown <broonie@...nel.org>
To:     Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Cc:     Serge Semin <Sergey.Semin@...kalelectronics.ru>,
        Serge Semin <fancer.lancer@...il.com>,
        Georgy Vlasov <Georgy.Vlasov@...kalelectronics.ru>,
        Ramil Zaripov <Ramil.Zaripov@...kalelectronics.ru>,
        Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
        Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
        Paul Burton <paulburton@...nel.org>,
        Ralf Baechle <ralf@...ux-mips.org>,
        Arnd Bergmann <arnd@...db.de>,
        Allison Randal <allison@...utok.net>,
        Gareth Williams <gareth.williams.jx@...esas.com>,
        Rob Herring <robh+dt@...nel.org>, linux-mips@...r.kernel.org,
        devicetree@...r.kernel.org,
        Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@...el.com>,
        Clement Leger <cleger@...ray.eu>,
        Charles Keepax <ckeepax@...nsource.cirrus.com>,
        "wuxu.wu" <wuxu.wu@...wei.com>,
        Phil Edworthy <phil.edworthy@...esas.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        linux-spi@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 12/19] spi: dw: Fix Rx-only DMA transfers

On Fri, May 15, 2020 at 05:40:50PM +0300, Andy Shevchenko wrote:
> On Fri, May 15, 2020 at 01:47:51PM +0300, Serge Semin wrote:
> > Tx-only DMA transfers are working perfectly fine since in this case
> > the code just ignores the Rx FIFO overflow interrupts. But it turns
> > out the SPI Rx-only transfers are broken since nothing pushing any
> > data to the shift registers, so the Rx FIFO is left empty and the
> > SPI core subsystems just returns a timeout error. Since DW DMAC
> > driver doesn't support something like cyclic write operations of
> > a single byte to a device register, the only way to support the
> > Rx-only SPI transfers is to fake it by using a dummy Tx-buffer.
> > This is what we intend to fix in this commit by setting the
> > SPI_CONTROLLER_MUST_TX flag for DMA-capable platform.

> I'm fine with this if Mark considers this right thing to do.
> So, conditionally
> Reviewed-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>

Yes, this is good - it's quite a common issue that controllers have and
the main reason the flag exists is to provide a standard fix for it.

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