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Date: Fri, 15 May 2020 17:40:50 +0300 From: Andy Shevchenko <andriy.shevchenko@...ux.intel.com> To: Serge Semin <Sergey.Semin@...kalelectronics.ru> Cc: Mark Brown <broonie@...nel.org>, Serge Semin <fancer.lancer@...il.com>, Georgy Vlasov <Georgy.Vlasov@...kalelectronics.ru>, Ramil Zaripov <Ramil.Zaripov@...kalelectronics.ru>, Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>, Thomas Bogendoerfer <tsbogend@...ha.franken.de>, Paul Burton <paulburton@...nel.org>, Ralf Baechle <ralf@...ux-mips.org>, Arnd Bergmann <arnd@...db.de>, Allison Randal <allison@...utok.net>, Gareth Williams <gareth.williams.jx@...esas.com>, Rob Herring <robh+dt@...nel.org>, linux-mips@...r.kernel.org, devicetree@...r.kernel.org, Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@...el.com>, Clement Leger <cleger@...ray.eu>, Charles Keepax <ckeepax@...nsource.cirrus.com>, "wuxu.wu" <wuxu.wu@...wei.com>, Phil Edworthy <phil.edworthy@...esas.com>, Thomas Gleixner <tglx@...utronix.de>, linux-spi@...r.kernel.org, linux-kernel@...r.kernel.org Subject: Re: [PATCH v2 12/19] spi: dw: Fix Rx-only DMA transfers On Fri, May 15, 2020 at 01:47:51PM +0300, Serge Semin wrote: > Tx-only DMA transfers are working perfectly fine since in this case > the code just ignores the Rx FIFO overflow interrupts. But it turns > out the SPI Rx-only transfers are broken since nothing pushing any > data to the shift registers, so the Rx FIFO is left empty and the > SPI core subsystems just returns a timeout error. Since DW DMAC > driver doesn't support something like cyclic write operations of > a single byte to a device register, the only way to support the > Rx-only SPI transfers is to fake it by using a dummy Tx-buffer. > This is what we intend to fix in this commit by setting the > SPI_CONTROLLER_MUST_TX flag for DMA-capable platform. I'm fine with this if Mark considers this right thing to do. So, conditionally Reviewed-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com> > > Signed-off-by: Serge Semin <Sergey.Semin@...kalelectronics.ru> > Cc: Georgy Vlasov <Georgy.Vlasov@...kalelectronics.ru> > Cc: Ramil Zaripov <Ramil.Zaripov@...kalelectronics.ru> > Cc: Alexey Malahov <Alexey.Malahov@...kalelectronics.ru> > Cc: Thomas Bogendoerfer <tsbogend@...ha.franken.de> > Cc: Paul Burton <paulburton@...nel.org> > Cc: Ralf Baechle <ralf@...ux-mips.org> > Cc: Arnd Bergmann <arnd@...db.de> > Cc: Allison Randal <allison@...utok.net> > Cc: Andy Shevchenko <andriy.shevchenko@...ux.intel.com> > Cc: Gareth Williams <gareth.williams.jx@...esas.com> > Cc: Rob Herring <robh+dt@...nel.org> > Cc: linux-mips@...r.kernel.org > Cc: devicetree@...r.kernel.org > --- > drivers/spi/spi-dw.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c > index 1edb8cdd11ee..31607b40147d 100644 > --- a/drivers/spi/spi-dw.c > +++ b/drivers/spi/spi-dw.c > @@ -517,6 +517,7 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws) > dev_warn(dev, "DMA init failed\n"); > } else { > master->can_dma = dws->dma_ops->can_dma; > + master->flags |= SPI_CONTROLLER_MUST_TX; > } > } > > -- > 2.25.1 > -- With Best Regards, Andy Shevchenko
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