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Message-ID: <20200515121815.GB5066@sirena.org.uk>
Date: Fri, 15 May 2020 13:18:15 +0100
From: Mark Brown <broonie@...nel.org>
To: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Cc: Serge Semin <Sergey.Semin@...kalelectronics.ru>,
Serge Semin <fancer.lancer@...il.com>,
Georgy Vlasov <Georgy.Vlasov@...kalelectronics.ru>,
Ramil Zaripov <Ramil.Zaripov@...kalelectronics.ru>,
Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
Paul Burton <paulburton@...nel.org>,
Ralf Baechle <ralf@...ux-mips.org>,
Arnd Bergmann <arnd@...db.de>,
Allison Randal <allison@...utok.net>,
Gareth Williams <gareth.williams.jx@...esas.com>,
Rob Herring <robh+dt@...nel.org>, linux-mips@...r.kernel.org,
devicetree@...r.kernel.org,
Jarkko Nikula <jarkko.nikula@...ux.intel.com>,
Wan Ahmad Zainie <wan.ahmad.zainie.wan.mohamad@...el.com>,
Thomas Gleixner <tglx@...utronix.de>,
"wuxu.wu" <wuxu.wu@...wei.com>, Clement Leger <cleger@...ray.eu>,
linux-spi@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 02/19] spi: dw: Add Tx/Rx finish wait methods to the
MID DMA
On Fri, May 15, 2020 at 03:01:11PM +0300, Andy Shevchenko wrote:
> General question, doesn't spi core provides us some helpers like
> spi_delay_exec()?
Well, nobody wrote one. It's also a bit tricky to handle given that
often you're checking some controller specific things while a FIFO in
the IP drains/fills, though nothing insurmountable.
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