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Message-ID: <CAHp75Ven9q-6dDYtP_uXigeS_r2uvpUZVR5Mh0RdEd36MbTG+Q@mail.gmail.com>
Date:   Fri, 15 May 2020 17:25:32 +0300
From:   Andy Shevchenko <andy.shevchenko@...il.com>
To:     kbuild test robot <lkp@...el.com>
Cc:     "Ramuthevar,Vadivel MuruganX" 
        <vadivel.muruganx.ramuthevar@...ux.intel.com>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        "open list:MEMORY TECHNOLOGY..." <linux-mtd@...ts.infradead.org>,
        devicetree <devicetree@...r.kernel.org>, kbuild-all@...ts.01.org,
        Miquel Raynal <miquel.raynal@...tlin.com>,
        Richard Weinberger <richard@....at>,
        Vignesh R <vigneshr@...com>, Arnd Bergmann <arnd@...db.de>,
        Brendan Higgins <brendanhiggins@...gle.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Boris Brezillon <boris.brezillon@...labora.com>,
        Anders Roxell <anders.roxell@...aro.org>,
        masonccyang@...c.com.tw
Subject: Re: [PATCH v7 2/2] mtd: rawnand: Add NAND controller support on Intel
 LGM SoC

On Fri, May 15, 2020 at 4:48 PM kbuild test robot <lkp@...el.com> wrote:

> sparse warnings: (new ones prefixed by >>)
>
> >> drivers/mtd/nand/raw/intel-nand-controller.c:441:24: sparse: sparse: incorrect type in argument 1 (different base types) @@    expected unsigned int val @@    got restricted __be32 [assignedunsigned int val @@
> >> drivers/mtd/nand/raw/intel-nand-controller.c:441:24: sparse:    expected unsigned int val
> >> drivers/mtd/nand/raw/intel-nand-controller.c:441:24: sparse:    got restricted __be32 [assigned] [usertype] reg
>    drivers/mtd/nand/raw/intel-nand-controller.c:444:24: sparse: sparse: incorrect type in argument 1 (different base types) @@    expected unsigned int val @@    got restricted __be32 [assignedunsigned int val @@
>    drivers/mtd/nand/raw/intel-nand-controller.c:444:24: sparse:    expected unsigned int val
>    drivers/mtd/nand/raw/intel-nand-controller.c:444:24: sparse:    got restricted __be32 [assigned] [usertype] reg
>
>    440                  reg = cpu_to_be32(*pdata++);
>  > 441                  writel(reg, ebu_host->hsnand + HSNAND_CMSG_0);
>    442
>    443                  reg = cpu_to_be32(*pdata);
>    444                  writel(reg, ebu_host->hsnand + HSNAND_CMSG_1);

On BE:
cpu_to_be32 -> no-op
writel() -> converts reg to LE

On LE:
cpu_to_be32 -> converts to BE
writel() -> no-op (in terms of conversion)

Seems to me that the proper API (if above is intended) should be swab32().
But something tells me that above is broken (or my understanding is wrong).

-- 
With Best Regards,
Andy Shevchenko

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